The Schedule

1:00 pm - 1:05 pm

Welcome

1:05 pm - 1:35 pm

FPGA Architecture with a DL Lens

1:35 pm - 2:10 pm

FPGA DL accelerators and architectures

Break 2:10 pm - 2:20 pm

2:20 pm - 2:50 pm

Modifications to the Traditional FPGA Blocks

2:50 pm - 3:55 pm

New DL-Optimized FPGA Blocks

Break 3:55 pm - 4:05 pm

4:05 pm - 5:00 pm

Panel discussion