Progress Updates

September 2019

In the month of September, several preliminary actions were taken in an effort to clearly define the scope of the project. Among these actions, a team mission statement was established, a problem-action-resolution plan was developed, and a customer voice table / stakeholder table was completed. Following these initial actions, a first iteration proof-of-concept was designed and constructed. In the first iteration, a basic transceiver and receiver were created that can send binary files between two devices.

October 2019

After completing the first iteration proof-of-concept, several performance tests were conducted to determine the overall efficiency of the module. Among these tests was an estimate of the round-trip delay time (RTT) which exemplified how long a given packet would take to travel between a local computer and the LiFi module. The results of these performance tests indicated that improvements would be best suited towards allowing N>1 channels so that multiple media access could exist concurrently within the system.

November 2019

For the month of November, the team plans to further investigate the creation of a dedicated chip and the development of a GUI. The dedicated chip may be put on hold until a hardware model is devloped and thoroughly tested. Analog-to-Digital Converters arrived which are being used to develop the hardware model. A first iteration of the GUI was developed in HTML markup language. The POC can be found in the tab labeled "LiFi Portal" listed above. More information to follow.

Figure 1: A block diagram of the general Luxtron transceiver system

Week of 9/9

  • Developed rough block diagram of transceiver architecture
  • Discussed an "Enable Routing" handshake protocol

Week of 9/16

  • Academic research on Quadrature Amplitude Modulation
    • Highly resistant to ISI & ICI
    • Very spectrum-efficient
    • Hermite-Symmetric coding is advisable for optical transmission
  • Designed a simple LPF to shape an arduino PWM pulse (50% duty) into a sinusoidal signal
    • Successfully transmitted over LiFi channel & detected at RX
    • Harmonic noise presents design constraints on transmission frequencies & TX/RX design
Figure 2: The sinusoidal(ish) signal resultant from passing a 50% duty-cycle PWM pulse though a low-pass filter
Figure 3: An FFT algorithm at the LiFi receiver is able to detect a 2.5kHz signal transmitted with an LED
Figure 4: An error vector magnitude graphically displays offset between the ideal symbol constellation, and the actual transmitted symbols

Week of 9/23

  • Academic research on conventional transmitter architectures. Typical design constraints include:
    • Carrier & alternate sideband suppression
    • Error Vector Magnitude
    • Occupied Bandwidth
    • Harmonic & Spurious outputs
    • Frequency accuracy & stability
    • Power consumption & control
  • Research into Phase Shift Oscillators
    • Takes DC input, generates small-signal AC output
    • Simple oscillator design, but high phase noise

Week of 9/30

  • Academic research on conventional receiver architectures:
    • Key points: frequency selectivity & overall sensitivity
    • Superheterodyne Architecture
      • High vs Low side injection
      • IF rejection
      • Half-IF spurious response
      • LO leakage
    • Homodyne Architecture:
      • Solves issues of images & IF leakage
    • Quadrature Downconversion will be implemented
Figure 5: A superheterodyne receiver uses multiple stages of frequency mixing to amplify an RF signal and downconvert to baseband
Figure 6: A homodyne receiver resolves several issues of the superheterodyne by downconverting in a single step
Figure 7: A typical AM signal contains a high-frequency signal contained within an "envelope" formed by the baseband
Figure 8: AM demodulation causes the signal spectrum's magnitude to attenuate by 1/2, and the spectrum bandwidth to double

Week of 10/7

  • Research on Amplitude Modulation:
    • Double Sideband Suppressed Carrier (DSSC) is simplest to implement
      • Bandwidth is doubled, amplitude is halved in modulation
      • Demodulated by mixing with carrier LO
    • Double Sideband Large Carrier (DSLC) is modified DSSC
      • Carrier signal is used to initiate a phase locked loop
      • Demodulated with an envelope detector
      • Carrier signal consumes majority of transmission power
    • Research on Low-Noise Amplifiers
      • amplifier used in receiver's first gain stage
      • Carries most impact on received signal's noise
      • Goal: maximize gain while minimizing noise figure

Week of 10/14

  • Research on frequency mixers:
    • Multiplying two frequencies together, to either upconvert or downconvert the signal
    • Types of Mixers:
      • Diode Mixers
      • Switching Mixer
      • Active FET Mixer
      • Balanced Mixer
  • Research on wireless system security
    • A General Security analysis model - identify the system's:
      • Assets
      • Perpetrators
      • Threats
      • Existing safeguards
      • Vulnerabilities
      • Additional Controls
    • Identify your system's security services:
      • Identification
      • Authentication
      • Access Control
      • Confidentiality
      • Availability
      • Integrity
      • Non-repudiation
Figure 9: A simple switching mixer can be used to mix signals between 2 amplitude states without investing in inductors for stabilization
Figure 10: This security assessment model can be used to identify potential system threats
Figure 11: A complete set of security services as defined in ISO-7498-2:1989, “Information processing systems -- Open Systems Interconnection -- Basic Reference Model -- Part 2: Security Architecture.”
Figure 12: LTSpice simulation of a phase-shift oscillator
Figure 13: Actual output of the assembled phase shift oscillator with an oscilloscope

Week of 10/21

  • Research on angle modulation:
    • Encoding data with the signal's argument, rather than magnitude
      • Frequency Modulation (FM)
        • Max & Instantaneous frequ.
      • Phase Modulation (PM)
        • Max & instantaneous phase
      • Bandwidth will always be larger than twice the baseband (less spectral efficient than AM)
      • Wideband vs Narrowband modulation
  • Research on oscillators
    • Generates a sinusoidal frequency with a DC input
      • Phase-shift oscillators
      • Colpitt's oscillator
  • Designed, simulated, & assembled a 47.5kHz phase-shift oscillator
    • 3 60-degree shift networks produce a 180-degree shift to be used as feedback
    • Modeled on LTSpice


Week of 10/28

  • Research on Phase-Locked Loops & Frequency Synthesizers
    • Tunable Local Oscillators exhibit a transient delay when changing frequency
    • Phase detectors in a PLL can minimize transient impact when tuning an oscillator
    • Frequency Synthesizers implement this methodology to synthesize many frequency channels very quickly
  • Research on TCP IP vs. UDP Protocols
    • TCP Protocol best for sending data reliably where speed does not matter.
    • UDP Protocol best for sending data quickly without establishing a secure connection.
    • TCP should be used for this project because data reliability is more important than speed.
Figure 14: A phase-locked loop (PLL) can be used to force a local oscillator to quickly assume a steady-state when tuning a frequency
Figure 15: The TCP protocol header vs. UDP protocol.
Figure 16: Noise across a transmission channel will produce constellation offsets in the receiver

Week of 11/4

  • Research on AM & FM demodulation with AWGN:
    • Noise power will degrade the performance of a receiver
    • AWGN thermal noise follows Gaussian distribution
    • Measure Signal-to-Noise ratios (SNRs) at system input and output, derive Noise Figure, Demod. Gain
  • Research on Power Amplifiers
    • Final amplifier before transmission in TX chain
    • Responsible for largest system power consumption - careful design is necessary
    • Use two-tone test to measure intermodulation noise
    • Linearity must be maintained - mind 1dB compression point


Week of 11/11

  • Wireless Security Assessment on Light Fidelity
    • A thorough assessment on wireless security concepts was conducted - full report accessible here
    • LiFi's limited range provides inherent enhancement to confidentiality services
    • Local Area Networks are inherently susceptible to attacks on Availibility & Integrity - these issues persist in a LiFi implementation
    • OFDM subcarrier interleaving by channel estimation parameters may enhance confidentiality
    • Intrusion Detection Systems (IDS) will provide safeguards for availability and integrity
  • Further research on UDP Protocol
    • While TCP is best for this project, a UDP proof-of-concept will be developed to initially wrap the data in a UDP header.
    • Once the UDP header is developed, a similar ideology can be applied to create the TCP header for final design.
Figure 17: A block-level implementation of an intrusion detection system in IEEE 802.11 local area networking - a similar system may be implemented in LiFi
Figure 18: An example of Luxtron's UDP header which will be wrapped around individual data packets.

Week of 11/18

  • Completion of UDP Header
    • Data packets were wrapped in a UDP header which indicated both a source and destination port, as well as a checksum and length for error handling.
    • Functionality was implemented into the LiFi module to support use of this UDP header.
    • Additional error handling methods were implemented in Python / Arduino to ensure reliable transmission.
  • Full Design of Light Fidelity Transmitter and Receiver subsystems
    • A culmination of previous week's work on hardware design components
    • Transmitter will separately modulate the quadrature components of 4 subcarrier signals to acheive 16QAM modulation across 4 OFDM subcarriers
    • Transmission will use external power amplifier (wall outlet)
    • Direct-conversion receiver will filter noise, isolate subcarrier signals, split into quadrature and perform A/D conversion
    • OFDM pilot tone will manage automatic gain control, range, etc
    • See below for system block diagrams

LiFi Design: System Block Diagrams

Figure 20: LiFi Radio transmitter design, at the block-component level
Figure 21: LiFi Radio receiver design, at the block-component level

Week of 11/25 - Thanksgiving Break! No Meeting

Week of 12/02

  • Research of implementing UDP Header into TCP
    • The existing UDP header was modified to incorporate basic components of the TCP IP Protocol.
    • 9-Bit Control Flags were added to the existing protocol.
    • A sequence number was added to determine the order of data being transferred.
Figure 22: A typical TCP IP header used for data transmission.

Weeks 12/09 to 1/20 - Winter Recess

Week of 1/27

This is the first week that the team is back together and working on this project for the Spring 2020 semester. A team meeting was held on 1/23 to discuss goals and objectives for the upcoming weeks.

Middleware Development

  • Client server program was written in C# to utilize TCP protocols. Further testing of the network / datalink layer provided helpful insight.

Software Development

  • The team is beginning a first iteration of the application layer software. An original POC is demonstrated under the "LiFi Portal" tab above. Functionality for this wireframe is being developed locally, the team is stil determining which software language is best.

Hardware Development

  • Bought several components for physical LiFi circuit:
    • 5 SN74LS629 voltage-controlled oscillators
    • 3 VEMD8080CT-ND PIN photodiodes
      • Too small to surface mount - sunk costs
  • Successfully integrated Digital-to-Analog conversion (DAC) with Arduino microprocessor
    • Used R-2R circuit w/ GPIO pins
    • 5% resistors used = > resolution finer than 6 bits are indistinguishable
    • Will be replaced with IC
Figure 23: Oscilloscope displaying output of R-2R DAC from Arduino 2560 GPIO pins where R=1kOhms, at 4-bit resolution

Week of 2/3

Significant progress is being made on the physical prototype. Final components are being purchased and assembled. CPEs are continuing to research middleware & TCP/IP integration

Hardware Development

  • Protoboards purchased to surface mount oscillator chips & add through-hole pins
  • Oscillator successfully generated 1MHz carrier signal - Figure 24 depicts the modulated signal produced when VCO signal is mixed with DAC output
  • BPW34 through-hole PIN diode (x10) and MTE6066N5-UR LEDs (x10) purchased as high-speed VLC antennas
Figure 23: Oscilloscope displaying AM modulated signal output; 1MHz VCO carrier signal mixed with a 3-bit resolution DAC baseband signal

Week of 2/10

In the week of 2/10, the team focused on the development of specific middleware to communicate between the datalink and transport layers. A software workflow is shown to the side.

In this simple model, the processor cycles through 4 unique tasks, each containing their own message queue. The message queues act as buffers for the middleware system. The workflow illustrates how the program responds to different events as a result of incoming messages.

Figure 24: Software workflow for Middleware designed to communicate between datalink and transport layers

Week of 2/17

This week, A priority Inversion matrix was developed which maps out the resource allocation for three tasks when only one resource is available. This method was developed as a part of the CPE545 Data Structures Lecture. This matrix is particularly important for resource sharing on the Raspberry Pi when multiple signals are trying to access the Pi core at any one time.

Figure 25: Priority Inversion Matrix for events taking plae on the Raspberry Pi

Week of 2/24 and 3/2

An experimentation of the Simple Network Management Protocol (SNMP) was used to test the feasibility of the protocol. The team tried an implementation developed by Net-SNMP.org but was not satisfied with the results. The protocol actually caused transfer speeds to slow down which was not ideal.

Investigation of another alternative is taking place but the team will likely have to develop their own modified version of the SNM-Protocol due to the fact that all network protocols are meant for WiFi, the current industry standard.

Figure 26: SNMP Workflow for Middleware
Figure 27: LiFi Transmitter with Arduino microcontroller

Week of 3/9

  • Transmitter construction and testing
    • R-2R Ladder functions as 8bit DAC
    • LS629 Oscillator chip generates carrier signal
    • Arduino serial generates baseband through DAC
    • Simple diode mixer combines the signals into passband
    • AM signal impedance-matched and fed to LED

Week of 3/16 - Spring Break | US Society & Economy Collapses

Week of 3/23

  • The team began to meet digitally over Zoom to discuss feasibility of the project while working remotely. It was determined that further development of hardware will be difficult given the circumstances but software and middleware development will continue as planned.
  • The final presentation will be largely theoretical - working model will depend on parts difficult to get while global supply chains are collapsing. Redirecting the presentation to focus more on the future capabilities of LiFi as opposed to the short-term design on the Luxtron LiFi Module.
  • The team began to look at poster concepts for a final design poster. Brainstorming took place regarding how to simplify the technical science behind LiFi and visible light communication.
  • Developed a script for elevator pitch with TG professor

Week of 4/6

The team developed an elevator pitch to convey key ideas and minimum viable product to stakeholders. The pitch emphasizes the limitations with current solutions and how LiFi can improve upon them. The MVP is a USB adapter designed for any PC or Mac that runs Linux, Windows, or MacOSx.

The team also began working on a project poster to showcase the science behind LiFi technology and the adapter that is being designed. The project poster should be finished by the following week.

Figure 28: Our Elevator Pitch

Week of 4/13

  • The team continues to work on the final poster
  • Our Team WON the semifinal pitch competition!

Week of 4/20

  • Team works with TG professor to refine elevator pitch for finalists round on Friday, 4/25
  • Team completed Design Poster, can be accessed here
  • Team works to complete Business Plan by EoD thursday

Week of 4/27

  • Judges for Ansary Pitch competition will be delivering questions on our pitch by Wednesday - team will work together to answer these by thursday
  • Full business plan was finished & delivered to TG professor
  • For Implementation: see fully realized & operational transmitter in week of 3/9