Beyond Objects: Contextual Synthetic Data Generation for Fine-Grained Classification
under submission, 2025
William Yang, Xindi Wu, Zhiwei Deng, Esin Tureci, Olga Russakovsky
COMPACT: COMPositional Atomic-to-Complex Visual Capability Tuning
under submission, 2025
Xindi Wu, Hee Seung Hwang, Polina Kirichenko, Esin Tureci, Olga Russakovsky
under submission, 2025
Charles Guinn, Samuel Stein, Esin Tureci, Guus Avis, Chenxu Liu, Stefan Krastanov, Andrew A. Houck, Ang Li
DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications
Arxiv, 2024
Marcelo Orenes Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction Trees
Arxiv, 2024
Marcelo Orenes Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems
ISPASS, 2024
Marcelo Orenes Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
Fangjun Hu*, Gerasimos Angelatos*, Saeed A. Khan, Marti Vives, Esin Tureci, Leon Bello, Graham E. Rowlands, Guilhem J. Ribeill, and Hakan E. Tureci
HetArch: Heterogeneous Microarchitectures for Superconducting Quantum Systems
IEEE/ACM International Symposium on Microarchitecture (MICRO-56), 2023
Samuel Stein*, Sara Sussman*, Teague Tomesh*, Charles Guinn*, Esin Tureci*, Sophia Fuhui Lin, Wei Tang, James Ang, Srivatsan Chakram, Ang Li, Margaret Martonosi, Fred Chong, Andrew A. Houck, Isaac L. Chuang, Michael DeMarco
Massive Data-Centric Parallelism in the Chiplet Era
Arxiv, 2023
Marcelo Orenes Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
Architectural Support for Optimizing Huge Page Selection Within the OS
IEEE/ACM International Symposium on Microarchitecture (MICRO-56), 2023
Aninda Manocha, Zi Yan, Esin Tureci, Juan L. Aragón, David Nellans, Margaret Martonosi
Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications
The IEEE International Symposium on High-Performance Computer Architecture (HPCA-29), 2023
Marcelo Orenes Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
The Implications of Page Size Management on Graph Analytics
IEEE International Symposium on Workload Characterization (IISWC), 2022
Aninda Manocha, Zee Yan, Esin Tureci, David Nellans, Juan Luis Aragón, Margaret Martonosi
GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures
ACM Transactions on Architecture and Code Optimization (TACO), 2021
Aninda Manocha, Tyler Sorensen, Esin Tureci, Opeoluwa Matthews, Juan Luis Aragón, Margaret Martonosi
A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration [Invited Talk]
The IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020
Tyler Sorensen, Aninda Manocha, Esin Tureci, Marcelo Orenes Vera, Juan L. Aragón, Margaret Martonosi
MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems
The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2020 (Best Paper Nominee)
Opeoluwa Matthews, Aninda Manocha, Davide Giri, Marcelo Orenes Vera, Esin Tureci, Tyler Sorensen, Tae Jun Ham, Juan L. Aragón, Luca P. Carloni, Margaret Martonosi
Foundations of Empirical Memory Consistency Testing.
Object-oriented Programming, Systems, Languages, and Applications (OOPSLA), 2020
J. Kirkham, T. Sorensen, E. Tureci, M. Martonosi
* Equal Contribution
For full list of publications, follow this link to Google Scholar.