B. Patidar, P. K. Mohanty, A. K. Swain, and K. Mahapatra, “An Explainable Multi-Stage RTL Hardware Trojan Detection Framework Using Structural, Semantic, and Risk-Aware Analysis,” in Proceedings of 2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (Accepted), 2026.
S. Behera, J Pattanaik, P. K. Mohanty, A. K. Swain, K. Mahapatra, "FPGA-Based Hardware Implementation of Image Filtering Techniques for Noisy Image Restoration," in Proceedings of 1st IEEE International Conference on Instrumentation (INSTCon), (Accepted), 2026.
P. K. Mohanty, S. Mahapatra, A. K. Swain and K. Mahapatra, "High-Efficiency FPGA Implementations of ASCON-128/128a: A Unified Pipelined Architecture for Authenticated Encryption in Edge Devices," 2025 IEEE International Symposium on Smart Electronic Systems (iSES), Jaipur, India, 2025, pp. 441-446, doi: 10.1109/iSES67504.2025.00091.
R. Karna, S. Padhy, P. K. Mohanty, R. Swain, D. K. Dash, and T. R. Lenka, "Design and Analysis of Energy-Efficient Approximate Multiplier," in Proceedings of Microelectronics, Nanoelectronics, Semiconductor Devices, VLSI Circuits, and Systems , 2024.