BOOKS
N. Sklavos, P. Kitsos, "A Practical Introduction to Hardware/Software Codesign", Greek Version, (Original Book, A Practical Introduction to Hardware/Software Codesign, Patrick R. Shaumont, 2nd Edition, Springer, 2013), New Tech Pub, ISBN:978-960-578-039-5, 2019.
P. Kitsos, “Digital System Design: Architectures, Methods and Tools”, Proceedings of 19th EUROMICRO Conference on Digital System Design (DSD 2016), Limassol, Cyprus, August 31st - September 2nd, 2016. Published by the IEEE Computer Society, ISBN-13: 978-1-5090-2816-0.
P. Kitsos and N. Sklavos, “Digital Systems Design into FPGAs”, (In Greek) New Tech Pub, ISBN 978-960-6759-88-8, 2014. This book is the Greek translation of the Wayne Wolf book “FPGA-based System Design”.
L. Bisdounis, "Modeling the operation of CMOS primitive circuits and MOSFET devices", chapter 5 (pp. 79-98) in System-Level Design Methodologies for Telecommunication, edited by N. Sklavos, M. Huebner, D. Goehringer and P. Kitsos, Springer, September 2013.
N. Sklavos, M. Huebner, D. Goehringer, P. Kitsos, “System-Level Design Methodologies for Telecommunication”, Springer-USA, ISBN 978-3-319-00663-5, 2013.
C. Gamrat, J.M. Philippe, C. Jesshope, A. Shafarenko, L. Bisdounis, U. Bondi, A. Ferrante, J. Cabestany, M. Hubner, J. Parsinnen, J. Kadlec, M. Danek, B. Tain, S. Eisenbach, M. Auguin, J.P. Diguet, E. Lenormand, J.L. Roux, "AETHER: Self-adaptive networked entities: Autonomous computing elements for future pervasive applications and technologies", chapter 7 (pp. 149-184) in Reconfigurable computing: From FPGAs to hardware/software codesign, edited by J.M.P. Cardoso and M. Hubner, Springer, August 2011.
P. Kitsos, “Digital System Design: Architectures, Methods and Tools”, Proceedings of 14th EUROMICRO Conference on Digital System Design (DSD 2011), Oulu, Finland, August 31st - September 2nd, 2011. Published by the IEEE Computer Society, ISBN 978-0-7695-4494-6.
Y. Zhang and P. Kitsos, “Security in RFID and Wireless Sensor Networks”, Auerbach Publications, ISBN-10: 1420068393, ISBN-13: 978-1420068399, 2009.
P. Kitsos and Y. Zhang, “RFID Security: Techniques, Protocols and System-On-Chip Design”, Springer-USA, ISBN-10: 0387764801, ISBN-13: 978-0387764801, 2008.
L. Bisdounis, D. Gouvetas, O. Koufopavlou, "Circuit techniques for reducing power consumption in adders and multipliers", chapter 5 (pp. 71-96) in Designing CMOS circuits for low power, edited by D. Soudris, C. Piguet and C. Goutis, European Low Power Initiative for Electronic System Design, Kluwer Academic Publishers, September 2002.
SELECTED JOURNALS
Ludwig Kapmel, Paris Kitsos, Dimitris Simos, “Locating Hardware Trojans Using Combinatorial Testing for Cryptographic Circuits”, IEEE Access, Vol. 10, pp: 18787 - 18806, 2022, DOI: 10.1109/ACCESS.2022.3151378.
Konstantinos G. Liakos, Georgios K. Georgakilas, Fotis C. Plessas, Paris Kitsos, “GAINESIS: Generative Artificial Intelligence NEtlists SynthesIS”, Electronics – Open Access Journal, Vol. 11, No. 2, 2022.
Georgios Flamis, Stavros Kalapothas, Paris Kitsos, “Best practices for the deployment of edge inference: The conclusions to start designing”, Electronics – Open Access Journal, Vol. 10, 2021.
C. Efstathiou and P. Kitsos, "Efficient majority logic magnitude comparator design", Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, Volume 82, April 2021.
Andreas Tsimpos, Andreas Christos Demartinos, Spyridon Vlassis, George Souliotis, "Multi-rate programmable equalizer for M-PHY serial interface", IEEE Transactions on Emerging Topics in Computing, Manuscript Type: Special Issue, vol. 9, issue. 1, pp. 379-398, January 2021.
L. Pyrgas, P. Kitsos, “Compact Hardware Architectures of Enocoro-128v2 Stream Cipher for Constrained Embedded Devices”, Electronics – Open Access Journal, Vol. 9, Issue. 9, 1505-1519, 2020.
F. Pirpilidis, L. Pyrgas, P. Kitsos, "8-bit Serialised Architecture of SEED Block Cipher for Constrained Devices", IET Circuits, Devices & Systems, 2020.
Apostolos Fournaris, Lampros Pyrgas, Paris Kitsos, “An Efficient Multi-parameter Approach for FPGA Hardware Trojan Detection”, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, Vol. 71, November 2019.
Spyridon Vlassis, George Souliotis, Fabian Khateb, Tomasz Kulej, "A 0.5V bulk-driven active voltage attenuator", Circuits, Systems, and Signal Processing, 38, pp. 5883–5895, 2019.
Spyridon Vlassis, Fabian Khateb, George Souliotis, "An on-chip linear, squaring, cubic and exponential analog function generator", IEEE Transactions on Circuits and Systems – I (CAS-I), January 2019, vol. 66, issue 1, pp. 94-104, doi: 10.1109/TCSI.2018.2841039.
Fotis Plessas, George Souliotis, Rodoula Makri, “A 76-84GHz CMOS 4x Subharmonic Mixer with Internal Phase Correction”, IEEE Transactions on Circuits and Systems – I (CAS-I), January 2018, vol. 65, issue 7, pp. 2083-2096.
George Souliotis, Fotis Plessas, Spyridon Vlassis, “A high accuracy voltage reference generator”, Microelectronics Journal, 75, 2018, pp. 61 - 67. https://authors.elsevier.com/a/1WhRe5~H7NSJG.
Andreas Tsimpos, Andreas Christos Demartinos, Spyridon Vlassis, George Souliotis, "A low-power frequency multiplier for multi-GHz applications", IEEE Transactions on Emerging Topics in Computing, June 2018, vol. 6, issue 2, pp. 200 - 206. (doi:10.1109/TETC.2016.2582732).
F. Pirpilidis, K. G. Stefanidis, A. G. Voyiatzis, P. Kitsos, “Effect analysis of Ring Oscillator length and hardware Trojan size on an FPGA-based implementation of the AES algorithm”, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, Vol. 54, 2017.
Spyridon Vlassis, Tomasz Kulej, Fabian Khateb, George Souliotis, "0.5V bulk-driven ring amplifier based on master-slave technique", Integrated Circuits & Signal Processing (ALOG), 90, pp. 189–197, 2017. DOI 10.1007/s10470-016-0858-2. http://rdcu.be/vFVd.
A. Demartinos, A. Tsimpos, S. Vlassis, G. Souliotis, “Jitter tolerance modeling and calibration for high-speed serial interfaces”, Integration, the VLSI Journal (Elsevier), vol. 57, pp. 101-107, 2017.
Andreas Demartinos, Andreas Tsimpos, Spiros Vlassis, George Souliotis. “Analogue feedback inverter based duty-cycle correction”, Analog Integrated Circuits and Signal Processing (ALOG/Springer), vol. 90, pp. 711–716, 2017. DOI 10.1007/s10470-016-0921-z.
Fabian Khateb, Spyridon Vlassis, Tomasz Kulej, George Souliotis, "Bulk-driven class AB fully-balanced differential difference amplifier", Analog Integrated Circuits and Signal Processing, October 2017, vol. 93, Issue 1, pp. 179–187. http://rdcu.be/ugbj.
George Souliotis, Costas Laoudias, Fotis Plessas and Nikolaos Terzopoulos, "Phase interpolator with improved linearity", Circuits, Systems and Signal Processing, 35(2), pp. 367-383, February 2016. (DOI: 10.1007/s00034-015-0082-9).
Andreas Tsimpos, Andreas Christos Demartinos, George Souliotis, Spiros Vlassis, “Multi-rate Phase Interpolator for High Speed Serial Interfaces”, Microelectronics Journal, vol. 54, pp. 40–47, August 2016. doi:10.1016/j.mejo.2016.05.008.
Andreas C. Demartinos, Andreas Tsimpos, Spyridon Vlassis, George Souliotis, Savvas Sgourenas. “A scalable Voltage Controlled Oscillator for Multi-rate High-Speed Interfaces", Microelectronics Journal, vol. 55, pp. 134–142, September 2016. doi: 10.1016/j.mejo.2016.07.003.
Andreas Christos Demartinos, Andreas Tsimpos, Spyridon Vlassis, George Souliotis. “Delay Elements Suitable for CMOS Ring Oscillators”, Journal of Engineering Science and Technology Review, 9(4), pp. 98-101, 2016.
A. Fournaris, I. Zafeirakis, P. Kitsos, O Koufopavlou, “Comparing Elliptic Curve Point Multiplication Design Approaches for Cryptography”, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, 2015.
E. Cuevas-Farfan, M. Morales-Sandoval, A. Morales-Reyes, C. Feregrino-Uribe, I. Algredo-Badilio, P. Kitsos, R. Cumplido, “Karatsuba-Ofman Multiplier with Integrated Modular Reduction for (2^^m)”, Advances in Electrical and Computer Engineering, Volume 13, Number 2, 2013.
P. Kitsos, N. Sklavos, G. Provelengios, A. N. Skodras, “FPGA-based Performance Analysis of Stream Ciphers ZUC, Snow3g, Grain v1, Mickey v2, Trivium and E0”, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, Vol. 37, Issue 2, 2013.
Morales-Sandoval, C. Feregrino-Ubire, R. Cumplido, P. Kitsos, “Area/Performance trade-off analysis of an FPGA digit-serial GF(2^m) Montgomery Multiplier based on LFSR”, Computer and Electrical Engineering, Elsevier, Vol. 39, Issue 2, 2013.
L. Bisdounis, "Analytical modeling of overshooting effect in sub-100nm CMOS inverters, Journal of Circuits, Systems, and Computers", World Scientific, vol. 20, no. 7, pp. 1303-1321, November 2011.
M. Morales-Sandoval, C. Feregrino-Uribe and P. Kitsos, “Bit-Serial and Digit-Serial GF(2^^m) Montgomery Multipliers using Linear Feedback Shift Registers”, IET Computers & Digital Techniques Journal, Vol. 5, Issue. 2, March 2011.
B. Geelen, V. Ferentinos, F. Catthoor, G. Lafruit, R. Lauwereins, D. Verkest, and T. Stouraitis, “Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements”, ACM Transactions on Embedded Computing Systems (TECS), 9(3): (2010).
B. Geelen, V. Ferentinos, F. Catthoor, S. Toulatos, G. Lafruit, T. Stouraitis, R. Lauwereins, and D. Verkest, “Exploiting varying resource requirements in wavelet-based applications in dynamic execution environments”, The Journal of Signal Processing Systems, 2009, Volume 56, Numbers 2-3.
B. Geelen, V. Ferentinos, F. Catthoor, G. Lafruit, D. Verkest, R. Lauwereins, and T. Stouraitis, “Spatial locality exploitation for runtime reordering of JPEG2000 wavelet data layouts”, ACM Transaction on Design Automation of Electronic Systems (TODAES), 15(1): (2009).
P. Kitsos, N. Sklavos, and O. Koufopavlou, “UMTS Security: System Architecture and Hardware Implementation”, Wireless Communications and Mobile Computing Journal, Volume 7, Issue 4, May 2007.
S. Nikolaidis, N. Kavvadias, T. Laopoulos, L. Bisdounis, S. Blionas, "Instruction-level energy modeling for pipelined processors, Journal of Embedded Computing", IOS Press, vol. 1, no. 3 (special issue on low-power embedded systems), pp. 317-324, March 2006.
N. Sklavos, P. Kitsos, K. Papadopoulos and O. Koufopavlou, “Design, Architecture and Performance Evaluation of the Wireless Transport Layer Security (WTLS)”, Journal of Supercomputing, Kluwer Academic Publishers, Volume 36, No. 1, pp: 33-50, 2006.
P. Kitsos, M. D. Galanis, and O. Koufopavlou, “An FPGA Implementation of the GPRS Encryption Algorithm 3 (GEA3)”, Journal of Circuits, Systems, and Computers (JCSC), World Scientific Publishing Company, Vol. 14, No. 2, pp: 217-231, 2005.
V. Ferentinos, B. Geelen, G. Lafruit, M. Milia, J. Bormans, F. Catthoor, and T. Stouraitis, “Optimized memory requirements for wavelet-based scalable multimedia codecs”, Journal of Embedded Computing (JEC), vol. 1, no. 3, pages 363–380, 2005.
L. Bisdounis, C. Dre, S. Blionas, D. Metafas, A. Tatsaki, F. Ieromnimon, E. Macii, Ph. Rouzet, R. Zafalon, L. Benini, "Low-power system-on-chip architecture for wireless LANs", IEE Computers and Digital Techniques, vol. 151, no. 1, pp. 2-15, January 2004.
G. Lafruit, E. Delfosse, R. Osorio, W. van Raemdonck, V. Ferentinos, J. Bormans, “View-dependent, scalable Texture Streaming in 3D QoS with MPEG-4 Visual Texture Coding”, IEEE Tr. Circuits and Systems for Video technology, Vol. 14: (7) 1021-1031; 2004.
C. Drosos, L. Bisdounis, D. Metafas, S. Blionas, A. Tatsaki, G. Papadopoulos, "Hardware-software design and validation framework for wireless LAN modems", IET Computers and Digital Techniques, vol. 151, no. 3, pp. 173-182, May 2004.
P. Kitsos, N. Sklavos, M. D. Galanis, and O. Koufopavlou, “64-bit Block Ciphers: Hardware Implementation and Comparison Analysis”, Computers and Electrical Engineering, Elsevier Science, Vol. 30, Issue: 8, pp. 593-604, November 2004.
P. Kitsos and O. Koufopavlou, “Efficient Architecture and Hardware Implementation of the Whirlpool Hash Function”, IEEE Transactions on Consumer Electronics, Vol. 50, Issue 1, February 2004, pp. 208-213.
P. Kitsos, G. Theodoridis, and O. Koufopavlou, “An Efficient Reconfigurable Multiplier Architecture for Galois field GF(2^^m)”, Elsevier Microelectronics Journal, Vol. 34, Issue 10, October 2003, pp. 975-980.
P. Kitsos, N. Sklavos, K. Papadomanolakis and O. Koufopavlou, “Hardware Implementation of the Bluetooth Security”, IEEE Pervasive Computing, Mobile and Ubiquitous Systems, Vol. 2, No. 1, Jan.-Mar. 2003, pp. 21-29.
SELECTED CONFERENCE PAPERS
Georgios Flamis, Stavros Kalapothas and Paris Kitsos, “Workflow on CNN utilization and inference in FPGA for embedded applications”, IEEE – 6th South-East Europe Design Automation, Computer Engineering, Computer Networks and Social Media Conference (SEEDA-CECNSM 2021), Preveza, Greece, September 24th-26th 2021.
L. Pyrgas, P. Kitsos, “5G Security: FPGA Implementation of SNOW-V Stream Cipher”, 24th Euromicro Conference on Digital Systems (DSD'21), Palermo, Italy, September 1-3, 2021.
Stavros Kalapothas, Georgios Flamis and Paris Kitsos, “Importing Custom DNN Models on FPGAs”, 9th International Conference on Cyber-Physical Systems and Internet-of-Things (CPS&IoT' 2021), Budva, Montenegro, June 7-10, 2021.
Lampros Pyrgas, Aliki Panagiotarou and Paris Kitsos, "Are ring oscillators without a combinatorial loop good enough for Hardware Trojan detection?", 23rd Euromicro Conference on Digital Systems (DSD'20), Slovenia, August 26 - August 28, 2020.
Orfeas Panetas-Felouris, Spyridon Vlassis, George Souliotis and Vasileios Panagiotopoulos, "A Bluetooth Low Energy DCO in 28nm FDSOI", 43rd International Conference on Telecommunications and Signal Processing (TSP), 2020, Milan, Italy.
Konstantinos Ampatzidis, Dimitrios Oikonomou, Paris Kitsos, Maria Rigou, "Α Smart Home Energy Management System Based on Internet-of-Things", 5th Panhellenic Conference on Electronics and Telecommunications-PACET (2019), November 8-9, 2019, Volos, Greece.
Anastasios Fanariotis, Theofanis Orphanoudakis, Vasilios Fotopoulos, Paris Kitsos, "DSD-i1: A mixed functionality development board geared towards digital systems design education", 22nd Euromicro Conference on Digital Systems (DSD'19), Kallithea, Chalkidiki, Greece, August 28 - August 30, 2019.
S. Vlassis, O. Felouris-Panetas, G. Souliots, F. Plessas, “Linear Current-to-Time Converter”, 14th IEEE Design and Technology of Integrated Systems (DTIS 2019), Mykonos, Greece.
Spyridon Vlassis, George Souliotis, Fotis Plessas, “Ultra low-voltage current squaring and multiplier”, International Conference on Modern Circuits and Systems Technologies (MOCAST) on Electronics and Communications 2019, Thessaloniki, Greece.
Spyridon Vlassis, Giannis Gialenios, George Souliotis, Fotis Plessas, “Power Detector Based οn Voltage Squaring”, 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungary.
Apostolos Fournaris, Lampros Pyrgas, Paris Kitsos, "An FPGA Hardware Trojan Detection Approach Based on Multiple Parameter Analysis", 21st Euromicro Conference on Digital Systems (DSD'18), Prague, Czech Republic, August 29 - August 31, 2018.
Lampros Pyrgas, Paris Kitsos, "A Hybrid FPGA Trojan Detection Technique Based-on Combinatorial Testing and On-chip Sensing",14th International Symposium on Applied Reconfigurable Computing (ARC 2018), Santorini, Greece, May 2-4, 2018.
Lampros Pyrgas, Filippos Pirpilidis, Aliki Panayiotarou, Paris Kitsos, "Thermal Sensor Based Hardware Trojan Detection in FPGAs", 20th Euromicro Conference on Digital Systems (DSD'17), Vienna, Austria, August 30 - September 1, 2017.
Labros Pyrgas, Paris Kitsos and Athanassios N. Skodras, "An FPGA Design for the Two-Band Fast Discrete Hartley Transform", 16th IEEE International Symposium on Signal Processing and Information Technology (ISSPIT 2016), Limassol, Cuprys, 12-14 December, 2016.
L. Bisdounis, "Efficient baseband modem physical implementation for fixed broadband wireless access networks", IEEE International Conference on Modern Circuits and Systems Technologies (MOCAST), Thessaloniki, Greece, May 2016, paper no. 17.
Paris Kitsos, Kyriakos G. Stefanidis and Artemios G. Voyiatzis, "TERO-based Detection of Hardware Trojans on FPGA Implementation of the AES Algorithm", 19th Euromicro Conference on Digital Systems (DSD'16), Limassol, Cyprus, August 31- September 2, 2016.
Artemios G. Voyiatzis, Kyriakos G. Stefanidis, Paris Kitsos, “Efficient Triggering of Trojan Hardware Logic”, 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2016), Kosice, Slovakia, April 20-22, 2016.
Paris Kitsos, Dimitris. E. Simos, Jose Torres-Jimenez, Artemios G. Voyiatzis, “Exciting FPGA Cryptographic Trojans using Combinatorial Testing”, 26th IEEE International Symposium on Software Reliability Engineering (ISSRE 2015), Gaithersburg, MD, USA, November 2-5, 2015.
Paris Kitsos and Artemios G. Voyiatzis, “Towards a Hardware Trojan Detection Methodology”, 2nd EUROMICRO/IEEE Workshop on Embedded and Cyber-Physical Systems (ECYPS 2014), Budva, Montenegro, 15-19, June 2014.
F. Pirpilidis, P. Kitsos, N. Sklavos, “An Efficient FPGA-Based Architecture of Skein for Simple Hashing and MAC Function”, 16th Euromicro Conference on Digital Systems (DSD'13), Santander, Cantabria, Spain, 4-6 September, 2013.
V. Ferentinos, M. MIlla, G. Lafruit, J. Bormans, F. Catthout, "Memory Comparator and Power Optimization for Wavelet-based Coders", Power and Timing, Modeling, Optimization and Simulation, Proc. 13th Workshop, September 2013.
Paris Kitsos, Nikolaos S. Voros, Tasos Dagiuklas, Athanassios N. Skodras, “A High Speed FPGA Implementation of the 2D DCT for Ultra High Definition Video Coding”, 18th International Conference on Digital Signal Processing (DSP 2013), Island of Santorini, Greece, July 1-3, 2013.
L. Bisdounis, "An accurate and compact MOSFET I-V model for nanometer CMOS circuit analysis", Panhellenic Conference on Electronics and Telecommunications (PACET), Thessaloniki, Greece, March 2012, paper no. S3.5.
G. Provelengios, P. Kitsos, N. Sklavos, C. Koulamas, “FPGA-based Design Approaches of Keccak Hash Function”, 15th Euromicro Conference on Digital Systems (DSD'12), Izmir, Turkey, 5-8 September, 2012.
P. Kitsos and A. N. Skodras, “An FPGA Implementation and Performance Evaluation of the SEED Block Cipher”, 17th International Conference on Digital Signal Processing (DSP 2011), July 6-8, Corfu, Greece, 2011.
L. Bisdounis, "Short-circuit energy dissipation model for sub-100nm CMOS buffers", IEEE International Conference on Electronics, Circuits and Systems (ICECS), Athens, Greece, December 2010, pp. 615-618.
P. Kitsos, N. Sklavos, A. N. Skodras, “Low Power FPGA Implementations of 256-bit Luffa Hash Function”, 13th Euromicro Conference on Digital Systems (DSD 2010), Lille, France, September 1-3, 2010.
P. Kitsos, G. Selimis, O. Koufopavlou, “High Performance ASIC Implementation of the SNOW 3G Stream Cipher”, IFIP/IEEE VLSI-SOC 2008 - International Conference on Very Large Scale Integration (VLSI SOC), Rhodes Island, Greece, October 13-15, 2008.
B. Geelen, A. Ferentinos, F. Catthoor, G. Lafruit, and D. Verkest, “Spatial locality trade-offs of wavelet-based applications in dynamic execution environments”, 1In IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pages 1461–1464, April 2008.
Paris Kitsos and Ulrich Kaiser, “A High-Speed Hardware Implementation of the Hermes8-128 Stream Cipher”, 18th European Conference on Circuit Theory and Design 2007 - ECCTD 2007, August 26- 30, 2007, Seville, Spain.
Paris Kitsos and Bhanu Prasad, “A System-on-Chip Design of the RadioGatún Hash Function”, International Conference on High Performance Computing, Networking and Communication Systems, 9-12 of July 2007 in Orlando, FL, USA.
B. Geelen, V. Ferentinos, F. Catthoor, A. Vandecappelle, G. Lafruit, T. Stouraitis, R. Lauwereins, and D. Verkest, “TSoftware-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications”, eSTREAM In Proc. IEEE 2006 Workshop on Signal Processing Systems (SIPS 2006).
J. Daemen and P. Kitsos, “The self-synchronizing stream cipher Moustique”, eSTREAM Phase 2, the ECRYPT Stream Cipher Project, (ECRYPT NoE). August 2006.
P. Kitsos and A. N. Skodras, “On the Hardware Implementation of the MUGI Pseudorandom Number Generator”, In proc. of the Fifth International Symposium on Communications Systems, Networks and Digital Signal Processing, (CSNDSP’2006), Patras, Greece, 19-21 July, 2006.
J. Daemen and P. Kitsos, “The self-synchronizing stream cipher Mosquito”, First Phase of ECRYPT Stream Cipher Project Report 2005/018, 2005, Scandinavian Congress Center, Aarhus, Denmark, 26-27 May 2005. This work is also presented in Symmetric Key Encryption Workshop (SKEW), ECRYPT project, Scandinavian Congress Center, Aarhus, Denmark, 26-27 May 2005.
P. Kitsos, M. D. Galanis, and O. Koufopavlou, “A RAM-Based FPGA Implementation of the 64-bit MISTY1 Block Cipher”, In proc. of IEEE International Symposium on Circuits & Systems (ISCAS'05), Kobe, Japan, May 23-26, 2005.
F. Menichelli, M. Olivieri, L. Benini, M. Donno, L. Bisdounis, "A simulation-based power-aware architecture exploration of a multiprocessor system-on-chip design", IEEE Design, Automation and Test in Europe Conference (DATE), Paris, France, February 2004, vol. 3, pp. 312-317.
L. Bisdounis, O. Koufopavlou, "Analytical modeling of short-circuit energy dissipation in submicron CMOS structures", IEEE International Conference on Electronics, Circuits and Systems (ICECS), Paphos, Cyprus, September 1999, pp. 1667-1670.