Dr. Anees Ullah, holds a PhD degree in Computer and Control Engineering from Politecnico di Torino, Italy and a Post-Doc from Nebrija University, Spain. He has over 12 years of R&D experience in FPGA-based systems design. He has been involved in several European projects during his higher studies which has resulted in several research publications in reputed journals. He has been involved in teaching subjects at undergraduate and graduate levels related to digital design and embedded systems for the past 10 years at several universities including at CUSIT Peshawar, UET Peshawar and CASE Islamabad.