Ph. D ("Thesis"): "Utilization of silicon Technology to design cost effective tandem solar cell"
M.Tech (“Thesis”): “Optimization and Comparative Analysis of 6T, 7T and 8T SRAM Cell at 65nm technology”.
M.Tech (2ndsem) Minor project: “Design of Energy efficient Full Adder Using hybrid-CMOS Logic Style”.
B.E. Final Year Major Project: “Pipelined Architecture of Microcontroller implementation on VHDL”.
B.E. Minor Project: “Automatic Room light controller with Visitor counter”.
2-week summer training in “ANALOGE SYSTEM DESIGN” from TEXAS UNITI program at VIT Vellore.
Participated in National Level Project Competition PRSTUTI-10 at CSIT Durg.
Participated in KSHITIJ’08 tech festival held at IIT, Kharagpur.