VEDIC LAB

Vision for Emerging Devices and Integrated Circuits (VEDIC) Laboratory

We at VEDIC lab are currently working on VLSI, CNN architecture, Audio data hiding, compact modeling of semiconductor devices etc. Dr. Aniruddha Kanhe and Dr. Suresh B. and their scholars are working on various projects in this lab. The salient features of the lab are as follows-

Features of the Lab:

1.       The laboratory can accommodate about 40 participants for workshops, hands-on training programs, and research activities.

2.       Access to complete suites from Cadence, Synopsys, and Mentor Graphics for front-end and back-end VLSI design.

3.       Capabilities include design for analog, digital, and mixed-signal applications.

4.       Advanced device modeling, design, and simulation using Synopsys Sentaurus TCAD tools.

5.       Unlimited licenses for CAD tools supported by MeitY under the SMDP C2S project sanctioned to NIT Puducherry.

6.       Design fabrication is supported through the 180nm CMOS technology process at Semiconductor Laboratory (SCL), Chandigarh.

7.       Equipped with state-of-the-art FPGA boards for laboratory teaching, hands-on learning, and rapid prototyping of research ideas.