Dr. Dhivya Ketharnath is a Senior Module Development Engineer (R&D) in Sort and Test Technology Development at Intel Corporation, USA. She has nearly a decade of experience in shipping world-class processors with expertise in technology development and innovative chip packaging solutions. 

In her most recent role at Intel, she has worked as the lead engineer responsible for delivering technical specifications for probe card design, test program, and developing stable sort processes across Foveros products (Meteor Lake, Lunar Lake, Panther Lake), Hybrid Bond (pathfinding and Clearwater Forest), and EMIB products (45um, 36um, and 35um pitch). She's owned cross-team working groups for technical deep dive, conducted task force, and successfully coordinated the sort program across multiple products. She has mentored numerous team members and provided training to successfully improve their technical skills to transition to a module development engineer role.

Before joining Intel, she served as a Research Fellow and Adjunct Professor at the University of Missouri-Kansas City (UMKC). She has also served as a Visiting Fellow at the Houston Methodist Research Institute, in their Department of Nanomedicine. Dr. Ketharnath received her Ph.D. in Electrical Engineering from the University of Houston (UH).