Ongoing Research:

  • Pathology on a Chip: To experimentally validate new drugs and biomarkers, large-scale inter-laboratory and inter-hospital cooperative clinical studies have become critical. However, with the widespread use of IHC in cancer diagnosis and research, test quality assurance and standardization have been highlighted as major issues in these fields. The IHC process is difficult to standardize because immunostaining quality is highly variable among laboratories, technicians, and protocols. In this collaborative initiative, we bring in biology, medicine, and engineering together to design an efficient artificial intelligence empowered microfluidic chip setup called IChip to enable quality and standardization in IHC pathology.

  • PRO Analytics with Neuromorphic System: – Patient-reported outcomes (PROs) are direct reports from patients about their health, quality of life, functional status, and goals of care which is considered a key quality indicator in healthcare. As PROs play a critical role in the industry for shifting toward a value-based care system, it is important to optimize PRO strategies. Optimizing PRO strategies can help improve clinical care by gathering high-quality data, optimizing value-based reimbursements, and making it inclusive and available to different groups of people. Current practices of collecting PROs lack adaptivity and inclusion and can be improved to be more reliable and accurate. We propose an event-camera integrated real-time questionnaire mechanism in conjunction with novel AI hardware and AWS cloud service for adaptive PRO analytics.

  • Photonic Deep Learning Accelerators: Deep learning is at the forefront of large-scale classification and prediction tasks. Deep learning accelerator, which involves convolutional neural network (CNNs) have received widespread attention for their accuracy and efficiency. For large and complex applications, the requirement to improve accuracy increases the dimension and complexity of CNN accelerators significantly. Traditional Von Neuman computing systems such as CPU/GPU can't provide the required throughput considering the limited power budget. We propose a completely analog deep learning accelerator based on silicon~photonic computing. The inherant parallelism and ultrafast nature of photonics in addition to its energy-efficient characteristics make silicon~photonic an ideal alternative to Silicon in the "post Moore era".

  • Analog Neuromorphic Training Accelerators: In recent times, deep neural networks (DNNs) have demonstrated significant economic impact in large-scale data analytics and classfication tasks such as pattern analysis, speech recoginition, image classification, etc. However, training of large-scale DNNs is a time consuming and computationally intensive task. It requires several state-of-the-art servers to be operating for several days/months. This becomes a performance/energy bottlneck considering the limitations of traditional CPU/GPU architectures. Here we propose a memristor-integrated photonic-based computing system to perform the required backpropgation training of deep learning algorithms.

Past Research:

  • Photonic Reservoir Computing: Recurrent Neural Networks (RNN) are often used in sequential classification and prediction problems. Recently, deep RNN is emerging as a promising alternative to RNN and similar neural network paradigm, for large-scale classification and prediction problems. However, training a deep RNN can be very difficult as weights of all interconnects between layers have to be determined using training dataset. Recently, Reservoir Computing (RC), a subset of RNN, has emerged as an alternative which is time efficient when it comes to training and provides similar or better accuracy. RC, also known as Liquid State Machine (LSM), utilizes the power of recurrent neural networks while working in a dynamical fashion. In an RNN the neurons are interconnected with weights that are trained. RC provides an efficient alternative to this, by having fixed weights for layers inside the reservoir. The weights for readout layer are then trained using training data set. This makes the training and classification/prediction faster. At present, RC is mostly implemented in software. The software implementations provide limited performance. Hence, the research community has looked towards hardware implementation of such an architecture. We propose a silicon~photonic based RC design which includes features like time-sharing and multilayer design for exascale performance.

    • Time-shared Photonic RC, D Dang et al. [arXiv preprint arXiv:1703.08211]

  • Photonic Network-on-Chip: hhThe increasing core-density of chip-multiprocessors (CMP) requires high bandwidth to support extensive inter-core communication. Electrical NoCs cannot offer such a large bandwidth while maintaining an acceptable level of power dissipation. On-chip photonic links provide several advantages over traditional metallic counterparts, such as near light speed data transfer, higher bandwidth density, and low power dissipation. Moreover, photonic links have several times lower data-dependent energy consumption compared to electrical wires, enabling the design of high-radix networks that are easier to program. Silicon photonics is thus becoming an exciting new option for on-chip communication, and has catalyzed much research in the area of photonic NoCs (PNoCs) for manycore systems. This investigation comprises of a high-performance and energy-efficienct 5-port non-blocking photonic router design. We use that router to design novel 2D and 3D PNoCs. We also address the inherest issues in Silicon~Photonic design such as thermal susceptibility and device faults.