Engineer at Qualcomm India Pvt. Ltd., Bangalore
Team: Design Methodology and Technology
Working on timing closure methodologies, clock convergence, Power Performance Area (PPA) optimization, and ECO convergence on a primary basis. Building wrappers in Tcl/Tk around different tools such as Synopsis Primetime and Design Compiler for developing customized flow
Day-to-day tasks involve finding methods to extract required data from a module design and analysis of this large data set to find out performance limiting factors.Â