DSD

Above you can see the various outputs from Lab 1 such as the 4 bit integer being displayed on the left due to switches as well as the hex representation on the left switching places.

Week 5

Met only once during the week
Chapter 9 was discussed
Lab 2 was started

Week 6

Chapter 10 and 11 was discussed about registers and data objects
Professor Lu will be traveling to India in the following week and we will not be holding classes
Lab 2 was finished as we booted the FPGA board from memory

Week 7 (No class)

No class

Week 8 (First Online)

Chapter 12 was started that discusses Looping constructs
We discussed how the rest of the semester will be structured due to the ongoing pandemic
The syllabus will not be changed and class may shift a little but not much
Labs can be partially be completed without the board, not critical to completion

Week 9

Discussed updating websites and went through all of the students websites
Free time was given to update the websites
The final project was also briefly described
Learned GitHub has a capital H
The coronavirus quarantine is in full affect and has been very impactful on me as a student. I was forced to leave much of my learning equipment such as my pc and multiple raspberry pis at school. Then during the sudden climb was forced to move out by a certain date by Stevens. During the tumultuous times, I am trying my best to keep up with studies and work. Professors have been very accommodating . I miss most the face to face communications with peers and professors as I value this form of communication the most.

Week 10

Started thinking about the final project. Will probably work on my own or maybe only one more student due to the coronavirus.
I am personally very interested in artificial intelligence and IoT. One problem that is faced with these systems is when implementing some kind of smart camera, computer vision algorithms can be expensive to implement on a server rather than the hardware recording the device. In order to overcome this, I will be looking into projects that use FPGA to aid in computer vision to smart camera systems used in security, telehealth, and other applications.
Useful papers published on the topic
- https://ieeexplore.ieee.org/abstract/document/6943263
- https://ieeexplore.ieee.org/abstract/document/631921

Week 11

Studying IEEE articles Real-time and low latency embedded computer vision hardware based on a combination of FPGA and mobile CPU and FPGA-based computing in computer vision
Looking into explore how FPGA has been used in computer vision & AI and how it could be used in the future

Week 12 On

From here on out, I will be detailing the labs I was able to complete from home. Much of the lab was not able to be tested due to not having all the materials, namely the Nexus A7 board. Instead, I practiced compiling the code and generating the bitstream that would be uploaded to the board.

Lab 3

This lab was made to see a bouncing ball on the FPGA board. The ball then would then have the shape, size, color and direction of the ball changed.

Above shows the implementation design as well as the generation of the bitstream.

Lab 4

The purpose of this lab was to create a Hex Calculator. The hex calculator would make use of the 7 segments display as well as the buttons and keypad. The calculator would then be modified to display no leading 0's and to also perform subtraction.

Above shows the implementation design as well as the generation of the bitstream.

Lab 5

The purpose of this lab was to create a siren. The siren would have different tones and wail rates. The audio would also be driven to different audio channels.

Above shows the implementation design as well as the generation of the bitstream.

Lab 6

The purpose of this lab was to create the game pong on the FPGA board. The project included 6 different source files and one constraint. The lab would be modified to include ball speed and bat width.

Above shows the implementation design as well as the generation of the bitstream.

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