• Google Scholar Link

Year 2024

1. 1. S. Roy, S. Paul, and T. K. Maiti, "VLSI Architectures of Forward Kinematic Processor for Robotics Applications," arXiv preprint arXiv:2403.04537, 2024. doi.org/10.48550/arXiv.2403.04537

   2. S. Paul and T. K. Maiti, "Accurate Kinematic-Parameters Estimation Using IMU and GPS Sensors Fusion", IEEE Sensors Journal, 2024 [submitted].

   3. Y. Patel, P. Rughani, and T. K. Maiti, "An Examination of the Security Architecture and Vulnerability Exploitation of the TurtleBot3 Robotic System," International Journal of Computing and Digital Systems(IJCDS), 2024 [Submitted].

   4. R. Mishra, T. K. Maiti, A. Jain, P. Lalwani, and R. Shah, Racket Sports Activities Monitoring and Corrections using Grip Embedded Sensors and Smartphone,  Patent filed (Patent no. 202411014828)

   5. T. K. Maiti, S. Roy, and S. Paul, High-Speed Computing Method with ARM Processor Based Microcontroller Connected to FPGA,  Patent filed (Patent no. 202421005317)

   6. T. K. Maiti, "Hands-On ROS for Robot Programming", 5-day hands-on workshop on Artificial Intelligence (AI), Jan 8 -12, 2024, RSC Bhavnagar, Gujarat, India (Invited).

Year 2023

1. 7. T. K. Maiti, M. Bhavsar, N. Sachaniya, and J. Vishwakarma, Self-Controlled Six-Wheel Robot Drive Enable with GPS and Distance Sensors Fusion,  Patent filed (Patent no. 202321089926)

   8. T. K. Maiti, "Visualization of Robot Movement Based on Component-Oriented Model for Embedded Worlds," IEEE SPS 6th Edition of New Trends in Signal Processing (NeTSiP-2023), Aug. 2023, Gujarat, India (Expert Talk).

   9. T. K. Maiti, “Robot Movement Visualization Based on Component-Oriented Simulation,” International Symposium on Devices, Circuits and Systems (ISDCS 2023), May 2023 Japan (Invited).

   10. T. K. Maiti, N. Patel, S. Kacha, and S. Paul, Aged Person Fall Detection Device,  Patent filed (Patent no. 202321037205)

   11. K. Nagrani and T. K Maiti, “Neural Network Architectures for Integrated Circuits,” International Symposium on Devices, Circuits and Systems (ISDCS 2023), pp. 1-4, May 2023 Japan.

Year 2022

1. 12. J.  Patel, H. Advani, S.  Paul, and T. K Maiti, “VLSI Implementation of Neural Network Based Emergent Behavior Model for Robot Control,” IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), pp. 1-4, Oct 2022, Shimoga, Karnataka, India.

   13. H. Advani, J. Patel,  and T. K Maiti, “Hardware-Efficient Q-Learning Accelerator for Robot Path Planning,” International Symposium on Devices, Circuits and Systems (ISDCS 2022), pp. 1-8, Mar 2022, Kolkata, India.

Year 2021

1. 14. T. K. Maiti, S. Dutta, Y. Ochi, M. Miura-Mattausch, and H. J. Mattausch, "Electro-Mechanical Model and Its Application to Biped Robot Stability with Force Sensors," International Journal of Robotics and Automation, 2021 (accepted).

   15. T. K Maiti, “ROS on ARM Processor Embedded with FPGA for Improvement of Robotic Computing,” International Symposium on Devices, Circuits and Systems (ISDCS 2021), pp. 197-201, Mar 2021 Japan.

Year 2020

1. 16. S. Dutta, T. K. Maiti, M. Miura-Mattausch, Y. Ochi, N. Yorino, and H. J. Mattausch, “Analysis of Sensor-Based Real-Time Balancing of Humanoid Robots on Inclined Surfaces,” IEEE Access, pp.212327-212338, vol. 8, Nov 2020.

   17. S. Patel, T. Garg, G. Patel, Roshani, B. Chaudhury, and T. K. Maiti, “Motion Retargeting and Machine Learning for Humanoid Robotics," International Symposium on Devices, Circuits, and Systems (ISDCS2020), pp. 197-201, Mar. 2020, Kolkata, India. DOI: 10.1109/ISDCS49393.2020.9263022

   18. G. Patel, R. Roshani, T. Garg, S. Patel, T. K. Maiti, and B. Chaudhury, “Inverse Kinematics Based Computational Framework for Robot Manipulation Inspired by Human Movements," Advances in Intelligent Systems and Computing book series, Springer Nature,  vol. 1262, pp. 201-215, 2020

   19. H. J. Mattausch, A. Luo, S. Bhattacharya, S. Dutta, T. K. Maiti, and M. Miura-Mattausch, “Force-Sensor-Based Walking-Environment Recognition of Biped Robots,," International Symposium on Devices, Circuits, and Systems (ISDCS2020), pp. 163-166, Mar. 2020, Kolkata, India. DOI: 10.1109/ISDCS49393.2020.9263005

Year 2019

1. 20. S. Bhattacharya, A. Luo, T. K. Maiti, S. Dutta, Y. Ochi, M. Miura-Mattausch, and H. J. Mattausch, “Surface-Property Recognition With Force Sensors for Stable Walking of Humanoid Robot,” IEEE Access, vol. 7, pp.146443-146456, Oct. 2019.

   21. N. Rohbani, H. Gau, S. Mohammadinejad, T. K. Maiti, D. Navarro, M. Miura-Mattausch, H. J. Mattausch, and H. Takatsuka, “Power Reduction and BTI Mitigation of Data-Cache Memory Based on the Storage Management of Narrow-Width Values,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27 , no. 7 , pp.1675-1684, Jul. 2019.

   22. A. Mukhopadhyay, T. K. Maiti, S. Bhattacharya, T. Iizuka, H. Kikuchihara, M. Miura-Mattausch, H. Rahaman, S. Yoshitomi, D. Navarro, and H. J. Mattausch, “Prevention of Highly Power-Efficient Circuits due to Short-Channel Effects in MOSFETs,” IEICE Transactions on Electronics, vol.E-102-C, no.6, vol. pp. 487-494, 2019.

   23. N. Rohbani, T. K. Maiti, D. Navarro, M. Miura-Mattausch, H. J. Mattausch, and H Takatsuka, “NVDLCache: Narrow-Width Value Aware Variable Delay Low-Power Data Cache,” IEEE 37th International Conference on Computer Design (ICCD), pp.264-272, Nov. 2019

   24. T. K. Maiti, “Robotics and Artificial Intelligence,” Workshop on Artificial Intelligence and Big Data Analytics, November 27~30, 2019, INS Valsura, India.

   25. A. Luo, S. Bhattacharya, S. Dutta, Y. Ochi, M. Miura-Mattausch, H. J. Mattausch, and T. K. Maiti, “Dynamic Pattern-Recognition-Based Walking-Speed Adjustment for Stable Biped-Robot Movement Under Changing Surface Conditions,” IEEE Global Conference on Consumer Electronics (GCCE 2019), pp.1-4, Nov. 2019, Japan, DOI: 10.1109/GCCE46687.2019.9015430 

   26. T. K. Maiti, S. Dutta, Y. Ochi, M. Miura-Mattausch, S. Bhattacharya, and H. J. Mattausch, “Power Consumption Estimation of Biped Robot During Walking,” International Symposium on Devices, Circuits and Systems (ISDCS), Mar. 2019, Hiroshima, Japan, DOI: 10.1109/ISDCS.2019.8719095

   27. S. Dutta, T. K. Maiti, Y. Ochi, M. Miura-Mattausch, S. Bhattacharya, N. Yorino, and H. J. Mattausch, “Stability Analysis of Humanoid Robots with Gyro Sensors Subjected to External Push Forces,” International Symposium on Devices, Circuits and Systems (ISDCS), Mar. 2019, Hiroshima, Japan. DOI: 10.1109/ISDCS.2019.8719090

   28. S. Ghosh, V. Roshan, A. Dutta, S. Das, T. K. Maiti, M. Miura-Mattausch, and H. Rahaman, “Optimization of DC-DC Power Converter Design with Second Generation HiSIM_HV Model,” International Symposium on Devices, Circuits and Systems (ISDCS), Mar. 2019, Hiroshima, Japan. DOI: 10.1109/ISDCS.2019.8719275

Year 2018

1. 29. T. K. Maiti, Y. Ochi, D. Navarro, M. Miura-Mattausch, and H. J. Mattausch, “Walking Robot Movement on Non-Smooth Surface Controlled by Pressure Sensor,” Advanced Material Letters, pp.123-127, vol. 9, no. 2, 2018.

   30. M. Miura-Mattausch, H. Kikuchihara, T. K. Maiti, D. Navarro, and H. J. Mattausch, “Modeling of Carrier Trapping and Its Impact on Switching Performance,” IEEE Journal of the Electron Devices Society, pp. 1056-1063, vol. 6, Aug. 2018. 

   31. M. Miura-Mattausch, H. Miyamoto, H. Kikuchihara, T. K. Maiti, N. Rohbani, D. Navarro, H.J. Mattausch, “Compact Modeling of Dynamic Trap Density Evolution for Predicting Circuit-Performance Aging,” Microelectronics Reliability, pp.64–175, vol.80, 2018. 

   32. T. K. Maiti, S. Bhattacharya, S. Dutta, Y. Ochi, D. Navarro, M. Miura-Mattausch, and H. J. Mattausch, “Multi-Discipline System Simulation for Robotics, 9th International Conference on Mechatronics and Manufacturing (ICMM 2018), pp.13, 2018, Thailand.

   33. S. Dutta, T. K. Maiti, Y. Ochi, M. Miura-Mattausch, S. Bhattacharya, D. Navarro, N. Yorino, H. Jürgen Mattausch, “Self-Controlled Walking Robot with Gyro Sensor Network for Stable Movement on NonSmooth Surface,” IEEE International Conference on Simulation, Modeling, and Programming for Autonomous Robots (SIMPAR 2018), pp. 42-48, May 2018, Brisbane, Australia.

   34. S. Bhattacharya, A. Luo, T. K Maiti, S. Dutta, M. Miura-Mattausch, D. Navarro ,H. J. Mattausch, “Fast Recognition of Walking Action Mode for Humanoid Robot Basing On Hardware Nearest Neighbor Search,” IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 331–334, Nov. 2018, Okinawa, Japan.

   35. S. Bhattacharya, S. Dutta, T. K. Maiti, M. Miura-Mattausch, D Navarro, H. Rahaman, D. Das and H. J Mattausch, “Machine Learning Algorithm for Autonomous Control of Walking Robot” International Symposium on Devices, Circuits and Systems (ISDCS), Mar. 2018, Kolkata, India, DOI: 10.1109/ISDCS.2018.8379644

   36. H. Gau, N. Rohbani, T. K. Maiti, D. Navarro, M. Miura-Mattausch, H.J. Mattausch, and H. Takatsuka, “Consistent Predictive Simulation of SRAM-Cell Performance Degradation Including Both MOSFET Fabrication Variation and Aging,” IEEE Electron Devices Technology and Manufacturing (EDTM), pp. 31-33, Mar. 2018, Kobe, Japan.

   37. T. K. Maiti, S. Dutta, S. Bhattacharya, Y. Ochi, D. Navarro, M. Miura-Mattausch, and H. J. Mattausch, “Modeling of Multi-Dimensional System and Its Application for Robot Development,” International Symposium on Devices, Circuits and Systems (ISDCS), Mar. 2018, Kolkata, India. DOI: 10.1109/ISDCS.2018.8379643

   38. S. Bhattacharya, T. K Maiti, S. Dutta, M. Miura-Mattausch, D. Navarro and H. J. Mattausch, “System Simulation for Robot Control Based on AI Approach,” IEEE International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), Oct. 2018, China. DOI: 10.1109/ICSICT.2018.8565654

   39. A. Mukhopadhyay, S. Bhattacharya, T. Iizuka, T. K. Maiti, M. Miura-Mattausch, A. Gau, D. Navarro, H. Rahaman, A. Sengupta, S. Yoshitomi and H. J. Mattausch, “MOSFET Optimization toward Power Efficient Circuit Design,” International Symposium on Devices, Circuits and Systems (ISDCS), Mar. 2018, Kolkata, India. DOI: 10.1109/ISDCS.2018.8379642.

Year 2017

1. 40. T. K. Maiti, L. Chen, H. Zenitani, H. Miyamoto, M. Miura-Mattausch, and H. J. Mattausch, “Compact Electro-Mechanical-Fluidic Model for Actuated Fluid Flow System,” IEEE Journal on Multiscale and Multiphysics Computational Techniques, pp.124-133, vol. 2, Jul. 2017.

   41. R. Jeyakumar, T. K. Maiti, M. Khader, N. Kandasamy, A. Verma, R. Nekovei, J. Kumar, N. Balaji, and J. Yi, “High-efficiency c-Si based interdigitated point contact back heterojunction solar cells”, Journal of Materials Science: Materials in Electronics, vol. 28, Iss. 13, pp. 9697–9703, Jul. 2017.

   42. T. K. Maiti, D. Navarro, M. Miura-Mattausch, and H. J. Mattausch, “Compact Modeling Approach for Electro-Mechanical System Simulation,” IEEE International Conference on ASIC (ASICON 2017), pp.1003-1006, Oct. 2017, China.

   43. T. K. Maiti, M. Miura-Mattausch, S. K. Koul, and H. J. Mattausch, “Compact Modeling of Integrated Walking-Robot System with Embedded Pressure Sensor and Motor,” 8th International Conference on Mechatronics and Manufacturing (ICMM 2017), pp.1-6, Jan. 2017, Tokyo, Japan (Excellent Oral Presentation Award). 

   44. T. K. Maiti, L. Chen, M. Miura-Mattausch, S. K. Koul, and H. J. Mattausch, “Physics Based System Simulation for Robot Electro-Mechanical Control Design,” IEEE Electron Devices Technology and Manufacturing Conference (EDTM), pp. 259-261, Feb. 2017, Japan.

   45. L. Chen, M. Miyamoto, T. K. Maiti, D. Navarro, T. Iizuka, H. J. Mattausch, and M. Miura-Mattausch, “Accurate Modeling of MOSFET Aging Based on Trap-Density Increase for Predicting CircuitPerformance Aging,” IEEE Electron Devices Technology and Manufacturing Conference (EDTM), pp. 262-264, Feb. 2017, Japan.

   46. N. Rohbani, H. Miyamoto, H. Kikuchihara, D. Navarro, T. K. Maiti, C. Ma, M. Miura-Mattausch, S. G. Miremadi, and H.J. Mattausch, “Circuit-Aging Modeling Based on Dynamic MOSFET Degradation and Its Verification,” International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp.97-100, Sept. 2017, Kamakura, Japan.

   47. T. K. Maiti, D. Navarro, M. Miura-Mattausch, S. K. Koul, and H. J. Mattausch, “Ground-Condition Detection with Pressure Sensor to Drive Two-Leg Robot,” European Advanced Materials Congress (EAMC), 2 pages, Aug 2017, Stockholm, Sweden, DOI: 10.5185/eamc.2017.

   48. T. K. Maiti, D. Navarro, M. Miura-Mattausch, and H. J. Mattausch, “GPS-Controlled Robot” 46th Technical meeting on Integrated Circuits Literacy, Toyama, Japan, Aug. 2017 (poster).

   49. M. Miura-Mattausch, H. Miyamoto, H. Kikuchihara, D. Navarro, T. K. Maiti, N. Rohbani, C. Ma, and H.J. Mattausch, “Modeling of Dynamic Trap Density Increase for Circuit Aging Simulation of Any MOSFET Applications,” European Solid-State Device Research Conference (ESSDERC), pp.192-195, Sept. 2017, Leuven, Belgium.

Year 2016

1. 50. T. K. Maiti, L. Chen, H. Zenitani, H. Miyamoto, M. Miura-Mattausch, and H. J. Mattausch, “Physically Based Compact Mobility Model for Organic Thin-Film Transistor,” IEEE Transactions on Electron Devices, vol. 63, Iss. 5, pp. 2057-2065, May 2016.

   51. L. Chen, T. K. Maiti, H. Miyamoto, M. Miura-Mattausch, and H. J. Mattausch, “Actuator-Control Circuit Based on OTFTs for an All-Organic Fluid Pump and Achievable Flow-Rate Estimation,” IEICE Transactions on Fundamentals of Electronics, vol. E99-A, no. 4, pp.798-805, Apr. 2016.

   52. H. Zenitani, T. K. Maiti, T. Hayashi, Y. Tanimoto, K. Sato, L. Chen, H. Kikuchihara, M. Miura-Mattausch, H. J. Mattausch, “Analysis of Printed Organic MOSFET Characteristics with Focus on the Temperature Dependence” Japanese Journal of Applied Physics, vol. 55, no. 4S, pp.04EL05-1-04EL05-6, 2016.

   53. T. K. Maiti, H. Zenitani, L. Chen, H. Miyamoto, M. Miura-Mattausch, and H. J. Mattausch, “Compact Modeling for System Level Simulation Based on Multi-Physics,” IEEE International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), pp.1-4, Oct. 2016, China.

Year (2006~2015)

1. 54. T. K. Maiti, T. Hayashi, L. Chen, H. Mori, M. J. Kang, K. Takimiya, M. Miura-Mattausch, and H. J. Mattausch, “A Surface Potential Based Organic Thin-Film Transistor Model for Circuit Simulation Verified With DNTT High Performance Test Devices,” IEEE Transaction on Semiconductor Manufacturing, vol. 27,  Iss. 2, pp.159-168, May 2014.

   55. R. Jeyakumar, T. K. Maiti, Amit Verma, “Two-Dimensional Simulation Studies on High-Efficiency Point Contact Back Heterojunction (a-Si:H/c-Si) Solar Cells”, Solar Energy, vol. 105, pp.109-115,July 2014.

   56. R. Jeyakumar, T. K. Maiti, and Amit Verma, “Influence of Emitter Bandgap on Interdigitated Point Contact Back Heterojunction (a-Si: H/c-Si) Solar Cell Performance,” Solar Energy Materials and Solar Cells, vol.09, pp.199-203, 2013. 

   57. T. K. Maiti, “From Transistor to Medicine: Materials, Devices, and Systems,” International Journal on Current Science & Technology, vol.1, no.1, pp.105-108, 2013.

   58. C. Mukherjee, S. Sengupta, C. K. Maiti, and T. K. Maiti, “Effects of Substrate Strain and Electrical Stress on Lattice Dynamics, Defects, and Traps in Strained-Si/Si0.81Ge0.19 n-type Metal-Oxide-Semiconductor Field Effect Transistors,” Journal of Applied Physics, vol.111, pp.104507, 2012.

   59. T. K. Maiti and C. K. Maiti, “DFM of Strained-Engineered MOSFETs Using TCAD,” American Journal of Engineering & Applied Science, vol.3. no.4, pp.683-692, 2010.

   60. T. K. Maiti, Dan Cheong, Jingfeng Yang, and R. N. Kleiman, “Modeling of the Electrical Carrier Transport in III-V on Silicon Tandem Solar Cell Structures,” Proceedings of SPIE - The International Society for Optical Engineering, vol. 8007, pp.80071W-6-80071W-6, 2011.

   61. T. K. Maiti and C. K. Maiti, “Hybrid Orientation Technology and Strain Engineering for Ultra-High Speed MOSFETs,” Bulletin Material Science, Vol. 35, No. 5, pp. 859-865, October 2012.

   62. T. K. Maiti and C. K. Maiti, “Nonequilibrium Green’s Function Based Quantum Transport Simulation for Strained-Engineered Nanoscale Transistors in Presence of Electron-phonon Interactions,” International Journal of Nanoscience, vol.9, no.4, pp.327-333, 2010.

   63. S. C. Pandey, A. Maiti, T. K. Maiti, and C. K. Maiti, “Online MOS Capacitor Characterization in LabVIEW Environment,” International Journal of Online Engineering (iJOE), vol.5, pp.57-60, 2009.

   64. P. Chakraborty, S.S. Mahato, T. K. Maiti, M. K. Bera, C. Mahata, S. K. Samanta, and C. K. Maiti, “Performance Improvement of Flash Memory using AlN as Charge-Trapping Layer,” Microelectronics Engineering, vol. 86. pp. 299-302, 2009.

   65. T. K. Maiti, S. S. Mahato, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “Impact of Negative Bias Temperature Instability on Strain-engineered p-MOSFETs: A Simulation Study,” Journal of Computational Electronics, pp.1-7. 2009.

   66. T. K. Maiti, A. Banerjee, and C. K. Maiti, “An Explicit Surface-Potential Based Biaxial Strained-Si n-MOSFET Model for Circuit Simulation,” Engineering Journal, vol.2 no.11, pp.879-887, 2010.

   67. T. K. Maiti, T. Das, P. S. Das, S. K. Sarkar and C. K. Maiti, “Strained-Si MOSFETs for Low-Power Applications,” ECS Transactions, pp.203-211, vol. 14, no. 1, Aug 2008.

   68. T. K. Maiti, S. S. Mahato, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “CMOS Performance Enhancement in Hybrid Orientation Technologies”, Journal of Computational Electronics, pp.181-186, 2008.

   69. P. Chakraborty, S. S. Mahato, T. K. Maiti, C. K. Maiti, and A. Biswas, “Charge Trapping in Memory Devices Using High-k Dielectrics,” International Journal of Computers, Information Technology and Engineering, vol. 2, no. 2, pp.71-76, 2008.

   70. T. K. Maiti, S. S. Mahato, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “Scaling of Strain-Engineered MOSFETs”, IETE Journal of Research, vol. 53, no. 3, pp. 263-236, 2007.

   71. T. K. Maiti, L. Chen, H. Miyamoto, M. Miura-Mattausch, and H. J. Mattausch, “Modeling of Electrostatically Actuated Fluid flow System for Mixed-Domain Simulation,” Proceeding of International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp. 190-193, Sept. 2015, USA.

   72. T. K. Maiti, L. Chen, H. Miyamoto, M. Miura-Mattausch, and H. J. Mattausch, “Mixed-Domain Compact Modeling Framework for Fluid Flow Driven by Electrostatic Organic Actuators,” Proceeding of European Solid-State Device Research Conference (ESSDERC), pp. 52-55, Sept. 2015, Graz, Austria.

   73. H. Zenitani, T. K. Maiti, T. Hayashi, Y. Tanimoto, K. Sato, L. Chen, H. Kikuchihara, M. Miura-Mattausch, and H. J. Mattausch, “Temperature Dependence Analysis of Printed Organic MOSFET,” Proceeding of International Conference on Solid State Devices and Materials (SSDM), pp.350-351, Sept. 2015, Japan.

   74. T. K. Maiti, T. Hayashi, L. Chen, M. Miura-Mattausch, and H. J. Mattausch, “Organic Thin-Film Transistor Compact Model with Accurate Charge Carrier Mobility,” Proceeding of International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp.133-136, Sept. 2014, Japan.

   75. L. Chen, T. K. Maiti, H. Miyamoto, M. Miura-Mattausch, and H. J. Mattausch, “OTFT Circuit Design for Actuator Driving Control in an Organic Fluid Pump,” 46th Int. Conf. on Solid State Devices and Materials (SSDM), pp.908-909, Sept. 2014, Japan.

   76. T. K. Maiti, T. Hayashi, H. Mori, M. J. Kang, K. Takimiya, M. Miura-Mattausch, and H. J. Mattausch, “Benchmarking of a Surface Potential Based Organic Thin-Film Transistor Model against C10-DNTT High Performance Test Devices,” Proceeding of IEEE International Conference on Microelectronic Test Structures (ICMTS 2013), Osaka, Japan, pp.157-161,  2013.

   77. T. K. Maiti, T. Hayashi, H. Mori, M. J. Kang, L. Chen, K. Takimiya, M. Miura-Mattausch, and H. J. Mattausch, “Surface Potential Based Modeling of Organic Thin-Film Transistor for Circuit Simulation,” Proceeding of International Workshop on Compact Modeling (IWCM), pp.27-32, Yokohama, Japan, 2013.

   78. C. Mukherjee, T. K. Maiti, and C. K. Maiti, “Random Telegraph Noise Characterization of p-type Silicon Nanowire FinFETs,” Proceeding of International Conference on Microelectronics (MIEL 2010), Nis, Serbia, pp.447-450, 2010.

   79. C. Mukherjee, T. K. Maiti, and C. K. Maiti, “Tunneling Spectroscopy of p-type Silicon Nanowire FinFETs,” International Conference on Semiconductor Electronics (ICSE2010), Malaysia, 2010.

   80. S. Sengupta, C. Mukherjee, T. K. Maiti, and C. K. Maiti, “Low-frequency Noise Behavior in Strained-Si/SiGe n-MOSFETs,” 26th International Conference on Defects in Semiconductors (ICDS-26), Nelson, New Zealand, 17-22 July, 2011.

   81. T. K Maiti and C. K. Maiti, “Charge-based Mobility Modeling for Organic Semiconductors,” Proceeding of International Workshop on Computational Electronics (IWCE 2009), pp.1-4, 2009.

   82. T. K. Maiti and C. K. Maiti, “Modeling of Radiation-induced Displacement Damage in Silicon Solar Cell: Frenkel Defect,” Proceeding of International Symposium. on the Physical and Failure Analysis of Integrated Circuits (IPFA 2009), pp.647-649, 2009.

   83. T. K. Maiti and C. K. Maiti, “Design and Optimization of c-Silicon Solar Cell using Process Compact Model (PCM),” Proceeding of IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS’09), pp.136-139, 2009.

   84. A. Maiti, M. K. Hota, T. K. Maiti, and C. K. Maiti, “Online Microelectronics and VLSI Engineering Laboratory,” International Workshop on Technology for Education, Aug 04-06, 2009, Bombay, India.

   85. T. K. Maiti and C. K. Maiti, “Nonequilibrium Green’s Function Based Quantum Transport Simulation for Strained-Engineered Nanoscale Transistors,” International Conference on Materials for Advanced Technologies (ICMAT2009), Singapore, J-S3.7(O) A00748-01324, 2009.

   86. M. K. Bera, C. Mahata, S. S. Mahato, T. K. Maiti, P. Chakraborty, and C. K. Maiti, “Hot Carrier Reliability of Strained-Si n-MOSFET,” Proceeding of International Workshop on Dielectric Thin Films for Future ULSI Devices (IWDTF), pp. 113-114, 2008, Tokyo, Japan.

   87. T. K. Maiti, A. K. Singh, and C. K. Maiti, “Ge Out-Diffusion: Performance Booster?,” Proceeding of International Conference on Nano and Microelectronics (ICONAME-08), pp.98-100, 2008, Pondicherry, India.

   88. T. K. Maiti, and C. K. Maiti, “Strained-Engineered MOSFETs: Design and Optimization Using TCAD,” 4th International SiGe Technology and Device Meeting (ISTDM), Mon-P1-60. 2008, Hsinchu, Taiwan, R.O.C.

   89. T. K. Maiti, S. S. Mahato, T. Das, P. S. Das, and C. K. Maiti, “Radiation Effects on Strain-Engineered MOSFETs,” Proceeding of15th Workshop on Dielectrics in Microelectronics (WoDIM 2008), pp. 161-163, 2008, Berlin, Germany.

   90. T. K. Maiti, T. Das, P. S. Das, S. K. Sarkar and C. K. Maiti, “Strained-Si MOSFETs for Low-Power Applications,” The 23rd Symposium on Microelectronics Technology and Devices(SBMicro), Brazil, 2008.

   91. T. K. Maiti, M. K. Bera, S. S. Mahato, P. Chakraborty, C. Mahata, M. Sengupta, A. Chakraborty, and C. K. Maiti, “Hot Carrier Degradation in Nanowire (NW) FinFETs” Proceeding of International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2008), pp.1-4, 2008, Singapore.

   92. S. Jasuja, T. K. Maiti, and C. K. Maiti, “High-density non-volatile SOHOS memory with Al2O3 as blocking oxides,” International Conference on Nano and Microelectronics (ICONAME-08), Pondicherry, India, pp.232-234, 2008.

   93. T. K. Maiti, S. S. Mahato, M. K. Bera, M. Sengupta, P. Chakraborty, C. Mahata, A. Chakraborty, and C. K. Maiti, “Stress-Induced Degradation in Strain-Engineered nMOSFETs,” Proceeding of International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2008), pp.1-3, 2008, Singapore.

   94. S. S. Mahato, P. Chakraborty, T. K. Maiti, M. K. Bera, C. Mahata, M. Sengupta, A. Chakraborty and C. K. Maiti, “DIBL in Short-Channel Strained-Si n-MOSFET,” Proceeding of International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2008), pp.1-4, 2008, Singapore.

   95. P. Chakraborty, S. S. Mahato, T. K. Maiti, S. Saha, and C. K. Maiti, “Tungsten Nanocrystal (W-NC) Flash Memory Cell,” Proceeding of International Conference on Nano and Microelectronics (ICONAME-08), pp.239-241, 2008, Pondicherry, India.

   96. G. Yugandhar, T. K. Maiti, and C. K. Maiti, “Vertical MOSFETs: single gate vs. double gate,” Proceeding of International Conference on Nano and Microelectronics (ICONAME-08), pp.95-97, 2008, Pondicherry, India.

   97. S. S. Mahato, T. K. Maiti, S. K. Sarkar, and C. K. Maiti, “Performance Enhancement in Scaled Strained-Si/SOI MOSFETs with High-k Gate Dielectrics,” Proceeding of International Conference on Nano and Microelectronics (ICONAME-08), pp.86-88, 2008, Pondicherry, India.

   98. S.S. Mahato, T. K. Maiti, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “Channel Engineering in MOSFETs,” E-MRS Spring Meeting, Symposium J, 2008.

   99. P. Chakraborty, S. S. Mahato, T. K. Maiti, M. K. Bera, C. Mahata, S. K. Samanta, and C. K. Maiti, “Performance Improvement of Flash Memory using AlN as Charge-Trapping Layer,”  E-MRS Spring Meeting, Symposium H, 2008.

   100. T. K. Maiti, S. S. Mahato, S. K. Sarkar, and C. K. Maiti. “Performance Enhancement of p-MOSFETs with Embedded SiGe Source/Drain on Hybrid Orientation Substrates,” International Conference on Ultimate Integration on Silicon (ULIS 2007), Belgium, 2007, ID-26.

   101. T. K. Maiti, S. S. Mahato, S. K. Sarkar, and C. K. Maiti, “Impact of Negative Bias Temperature Instability on Strain-engineered p-MOSFETs,” International Conference on Materials for Advanced Technologies (ICMAT2007), E-13-OR52, 2007, Singapore.

   102. T. K. Maiti, S. S. Mahato, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “Radiation Effects on Strain-Engineered p-MOSFETs,” Proceeding of International Workshop on Physics of Semiconductor Devices (IWPSD-2007), pp.161-163,  2007, India.

   103. T. K. Maiti, S. S. Mahato, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “RF Performance of Process-induced Strain-engineered n-MOSFETs,” Proceeding of International Workshop on Physics of Semiconductor Devices (IWPSD-2007), pp.154-156, 2007, India.

   104. T. K. Maiti, S.S. Mahato, S. K. Sarkar, and C. K. Maiti, “Technology CAD for Stress-Induced Degradation in Strain-Engineered pMOSFETs,” Proceeding of International Conference on Silicon Epitaxy and Heterostructures (ICSI-5), Marseille, France, pp.355-356, 2007.

   105. T. K. Maiti, S. S. Mahato, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “Finite Element Analysis of Heat Transfer in Nanowires (NWs),” Proceeding of International Workshop on Physics of Semiconductor Devices (IWPSD-2007), pp.382-384, 2007, India.

   106. T. K. Maiti, S. S. Mahato, and C. K. Maiti, “Modeling of Strain-Engineered Nanoscale MOSFETs,” Proceeding of International Conference on Nanotechnology & Health Care Applications (NateHCA-07), pp. D41-45, 2007, Mumbai, India.

   107. S. S. Mahato, D. Mitra, T. K. Maiti, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “Low Temperature Behavior of Strained-Si n-MOSFETs,” Proceeding of International Workshop on Physics of Semiconductor Devices (IWPSD-2007), pp.115-118, 2007, India.

   108. T. K. Maiti, A. R. Saha, and C. K. Maiti, “Design and Optimization of Embedded SiGe Source/Drain pMOSFETs,” Proceeding of International Symposium on Control Semiconductor Interfaces, pp.197-198, 2007, Tokyo, Japan.

   109. T. K. Maiti, S. S. Mahato, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “CMOS Performance Enhancement in Hybrid Orientation Technologies”, Proceeding of International Workshop on Computational Electronics (IWCE), pp.70-71, 2007, Massachusetts, USA.

   110. P. Chakraborty, S. S. Mahato, T. K. Maiti, S. Saha, and C. K. Maiti, “Technology CAD of non-Volatile SONOS Memory Devices,”  Proceeding of International Workshop on Physics of Semiconductor Devices (IWPSD-2007), pp.164-166, 2007, India.

   111. S. S. Mahato, T. K. Maiti, P. Chakraborty, S. K. Sarkar, and C. K. Maiti, “Reliability Predictions for Strained-Si/SiGe Quantum-Well p-MOSFETs,” Proceeding of International Workshop on Physics of Semiconductor Devices (IWPSD-2007), pp.198-200, 2007, India.

   112. P. Chakraborty, S. S. Mahato, T. K. Maiti, S. Saha, and C. K. Maiti, “Nanocrystal non-volatile flash memory devices: A simulation study,” International Conference on Nanotechnology & Health Care Applications (NateHCA-07), pp.D46-50, 2007, Mumbai, India.

   113. S. Jasuja, S. Jaurwal, T. K. Maiti, P. Chakraborty, S. S. Mahato, and C. K. Maiti, “Effect of High-k Dielectrics on Flash Memory Performance,” Proceeding of International Conference on Nanotechnology & Health Care Applications (NateHCA-07), pp.D62-65, 2007, Mumbai, India.

   114. S. S. Mahato, T. K. Maiti, S. K. Sarkar, and C. K. Maiti, “RF Performance Prediction for Strained-Si n-MOSFETs,” Proceeding of International Conference on Materials for Advanced Technologies (ICMAT2007), E-5-PO142, 2007, Singapore.

   115. S. S. Mahato, T. K. Maiti, R. Arora, A. R. Saha, S. K. Sarkar, and C. K. Maiti.  “Strain Engineering for Future CMOS Technologies”, Proceeding of International Conference on Computers and Devices for Communication (CODEC-06), Kolkata, India, 2006 (invited).

   116. T. K. Maiti, A. R. Saha, S. S. Mahato, S. K. Sarkar, and C. K. Maiti, “A Novel Technique to Reduce Self-heating in strained-Si MOSFETs”, Proceeding of International Conference on Computers and Devices for Communication (CODEC-06), pp.708-710, 2006, Kolkata, India.

Books

1. 117. C. K. Maiti and T. K. Maiti, Strain-Engineered MOSFETs, CRC Press, 2012, ISBN 9781466500556. 

   118. T. K. Maiti and C. K. Maiti, “Technology CAD of Nanowire FinFETs,” Nanowires, InTech, 2010, ISBN 978-953-7619 (book chapter).

Others

1. 119. C. K. Maiti, T. K. Maiti, and S. S. Mahato, “Strain-Engineered MOSFETs,” Semiconductor India, Magazine, Jun. 2008.

   120. T. K. Maiti, A. R. Saha, and C. K. Maiti, “Strain-Engineered FinFETs,” Synopsys University News Letter, Winter, 2008.