Comp 311-002
Computer Organization
Fall 2025
Comp 311-002
Computer Organization
Fall 2025
2025-08-19: Welcome to the first meeting of Comp 311!
2025-08-26: Problem Set #1 is posted and due on 09-09
2025-08-28: Office hours for the TA, and ULAs are posted
2025-09-03: McMillan's office number on the original website was incorrect. I should have been SN316 (It's fixed now). However, walk-in office hours are held in SN325, the conference room in the north-east corner of Sitterson. Also, there are a few issues with the problem set. The syntax of the instruction in problem 23 was incorrect. It should have been "jalr x0,(x8)".
2025-09-10: Problem Set #2 is posted and due on 09-23
2025-09-16: Office Hours by appointment are now available. Please reserve these for grading and personal issues.
2025-09-17: During office hours today we found two errors in "brokenFact,s". The version downloadable from the problem set is now fixed.
fixes: ----> addi t0,x0,a0 should be add t0,x0,a0
and: jalr x0,ra should be jalr x0,(ra)
2025-10-01: Problem Set #3 is posted and is due on 10-14.
Comp 311, Computer Organization, explores the topic of how computers work, in terms of both software and hardware. It covers a wide range of topics including what a bit is, and why bits are the atoms in the universe of computation. We also discuss how information is represented and processed in hardware, and arrive to the conclusion that, to a computer, everything is data, including the instructions that underly software.
Comp 311 also covers the wide range of languages, and layers of translation, used for computation-- spanning from machine language to assembly language to high-level compiled and interpreted languages. We will also touch on the conventions that enable us to construct large programs, modular software systems, and even programs that manage the loading, execution, and creation of other programs.
We then delve deeper into computer hardware to discover what means to be digital. We explore how simple logic can be made to perform math and manipulate bits and how logic and state can be made to perform a series of operations. This will culminate in the virtual construction of a simple, yet fully functional computer.
In the last third of the class we will discuss issues of performance. What the measures of MIPS and CPI mean, and how they can be improved. We will discuss simple techniques for increasing the rates which computer execute instructions including pipelining and parallelism. We will then address techniques for improving the apparent memory bandwidth of a computer and finally how to simulate more memory that we can actually afford.
A syllabus for this offering of Comp 311 is available here.
Leonard McMillan
Office: SN316
Walk-in Office Hours: Wed noon-3pm (starting 08-27)
Office Hours by Reservation: Wed 9am-11am (sign up here)
Email: mcmillan@cs.unc.edu
TA: Laura Yao
Office: SN217
Office Hours (by appt): Mon 12-2pm & Tues 10-11am
Email: lyao@cs.unc.edu
ULA: Aastha Sharma
Office: Sitterson Lobby
Office Hours: M 5pm-8pm, Th 5pm-7pm
Email: sharm@unc.edu
ULA: Luis Antonio Fajardo Jr
Office: Sitterson Lobby
Office Hours: T 5pm-8pm, Th 5pm-7pm
Email: lfajardo@unc.edu
6 problem sets (30%, 6% each with the lowest dropped)
2 In-class exams (40%, 20% each)
Final (25%)
Class participation (5%, Exercises and Class Participation)
Does the professor know you?
I will be using no book this semester. We will be depending on my notes and online materials. However, if you would like to supplemental course materials, the following book covers the same topics.
Computer Organization and Design RISC-V Edition:
The Hardware Software Interface (2nd Edition)
ISBN: 0128203315
Credit Hours: 3
Location: Manning Hall 0209
URL:
Prerequisites: Comp 211, Admission to the major
Note: Future dates in the following schedule are for reference only, and, therefore, are subject to change. 🔮
The UNC miniRISC-V Assembler/Simulator lets you write and run RISC-V assembly programs using the RV32I and parts of RV32M. Enter code in the built-in editor, then press Assemble to check and compile it. After fixing any errors, you can step through instructions one at a time (Step), run several at once (Multistep), or continue until a breakpoint (Run). Breakpoints are set by starting a line with *. Tools include memory dumps, saving and loading code, viewing the symbol table, and generating memory traces. A reference to the miniRISC-V instruction set is also provided.
The RISC-V reader is the common reference describing the RISC-V Instruction Set Architecture (ISA) and its extensions. It is therefore, the de facto standard for all things related to the processor that we will be using this semester. I have heard rumors that PDF versions of the text might be found online.
The PhD dissertation of Andrew Waterman is an alternative reference for the RISC-V ISA and it includes many motivations and comparisons to earlier architectures that you might find entertaining and informative. A PDF of it is available online here.