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Learning Outcome:
Learning Outcome:
Understand instruction formats for different addressing modes and implement an instruction lifecycle.
Tasks:
Tasks:
1. Define instruction formats for immediate, direct, register, and indirect addressing.
2. Simulate instruction fetch-decode-execute-write back cycle.
In register addressing mode, the operands for an instruction are located in the CPU's internal registers rather than in main memory. Registers are small, high-speed storage locations built directly into the CPU, making this addressing mode one of the fastest methods for accessing data. Since accessing data from registers is significantly quicker than fetching it from memory, instructions using this mode are highly efficient.In this mode, the instruction specifies the register name where the operand resides, instead of a memory address. This eliminates the need for additional memory fetch cycles, reducing instruction execution time.
In register addressing mode, the operands for an instruction are located in the CPU's internal registers rather than in main memory. Registers are small, high-speed storage locations built directly into the CPU, making this addressing mode one of the fastest methods for accessing data. Since accessing data from registers is significantly quicker than fetching it from memory, instructions using this mode are highly efficient.In this mode, the instruction specifies the register name where the operand resides, instead of a memory address. This eliminates the need for additional memory fetch cycles, reducing instruction execution time.
Example: MOV AX, BX
Example: MOV AX, BX
In this example, the contents of register BX are copied into register AX. No memory access is involved, making it a very efficient operation.
In this example, the contents of register BX are copied into register AX. No memory access is involved, making it a very efficient operation.
Working:
Working:
In register addressing mode, the operand is stored in one of the processor's registers. The instruction specifies which register contains the operand, and the CPU directly accesses the data from that register.
Key Points:
1. Operand Location: The operand is in the CPU's register, not in memory.
2. Instruction Length: The instruction specifies only the register, resulting in shorter instruction size.
3. Execution Speed: Accessing data from registers is faster compared to accessing data from memory.
4. Hardware Dependency: The number of available registers limits this addressing mode.
5. Common Usage: Used for operations requiring fast and repeated access to data.
This addressing mode is efficient for performing arithmetic or logical operations where operands are stored in registers.
Register File:
Register File:
PC:
PC:
Control Unit:
Control Unit:
ALU:
ALU:
16 Bit Register addressing mode:
16 Bit Register addressing mode:
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