CMOS sensors are increasingly used in machine vision. For a long time these image sensors had the (justified) reputation to produce blurred images, to have many pixel defects and to be less light-sensitive. Yet many of these disadvantages have continuously been compensated thanks to enhanced production technologies, and micro-lenses on the pixels (in order to enlarge the light-sensitive surface) and back-side illuminated CMOS sensors (back-side illumination of the sensor through very thin substrate instead of exposing through several structure layers on the surface) gave this technology its break.
And the advantages of this technology are not to be underestimated. Due to the integration of the readout electronics into the sensor, particularly energy-saving, cheap and compact designs can be realised. Especially the high resistance to blooming effects as well as high frame rates are interesting for machine vision.
A typical CMOS sensor layout consists of a grid of individual pixels, where each pixel contains a photodiode (light-sensitive element) alongside a small circuit of transistors, allowing for the direct conversion of the captured light into an electrical signal within each pixel, unlike CCD sensors which require charge transfer to a single readout amplifier; this arrangement is often referred to as an "active pixel sensor" (APS) with each pixel having its own amplification circuitry, resulting in faster readout speeds and more flexibility in design compared to traditional CMOS layouts.
A typical CMOS sensor layout consists of a grid of individual pixels, where each pixel contains a photodiode (light-sensitive element) alongside a small circuit of transistors, allowing for the direct conversion of the captured light into an electrical signal within each pixel, unlike CCD sensors which require charge transfer to a single readout amplifier; this arrangement is often referred to as an "active pixel sensor" (APS) with each pixel having its own amplification circuitry, resulting in faster readout speeds and more flexibility in design compared to traditional CMOS layouts.