Cheng Chu
Cheng Chu
PhD student
Intelligent Systems Engineering
School of Informatics and Computing
Indiana University Bloomington
Email: chu6@iu.edu
Office: MESH 051
2425 N. Milo B Sampson Ln
Bloomington
IN 47408
Biography
Cheng Chu is currently a Ph.D. student in the Department of Intelligent Systems Engineering at Indiana University. He received his M.S. and BS degrees from the Hefei University of Technology, hefei, Anhui, China, in 2021 and 2018. His research falls primarily in the field of quantum computing, with an emphasis on quantum computer architecture, quantum security, and quantum neural network design.
Cheng's research has won the Best Paper Award (3rd Place) at 2023 IEEE International Conference on Quantum Computing and Engineering (QCE), the Best Paper Award
Research Interests
Quantum computing, Quantum Security, Quantum Machine Learning
Computer Architecture
Acclererator Architecture Design for Neural Networks
News
02/2024 TITAN: A Distributed Large-Scale Trapped-Ion NISQ Computer is accepted by DAC 2024.
Honors and Awards
2023 QCE Best Paper Award - 3rd Place
Professional Activities and Service
Conference Reviewer:
ASPDAC 2024
IJCNN 2024
ISVLSI 2024
QCCC 2024
Publications
TITAN: A Distributed Large-Scale Trapped-Ion NISQ Computer
Cheng Chu, Zhenxiao Fu, Yilun Xu, Gang Huang, Hausi Muller, Fan Chen, and Lei Jiang
2024 Proceedings of the 61th ACM/IEEE Design Automation Conference (DAC)
QDoor: Exploiting Approximate Synthesis for Backdoor Attacks in Quantum Neural Networks
Cheng Chu, Fan Chen, Philip Richerme, and Lei Jiang
2023 IEEE International Conference on Quantum Computing and Engineering (QCE)
CryptoQFL: Quantum Federated Learning on Encrypted Data
Cheng Chu, Lei Jiang, and Fan Chen
2023 IEEE International Conference on Quantum Computing and Engineering (QCE)
IQGAN: Robust Quantum Generative Adversarial Network for Image Synthesis On NISQ Devices
Cheng Chu, Grant Skipper, Martin Swany, and Fan Chen
2023 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)
QTROJAN: A Circuit Backdoor Against Quantum Neural Networks
Cheng Chu, Lei Jiang, Martin Swany, and Fan Chen
2023 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)
Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses
Cheng Chu, Cheng Liu, Dawen Xu, Ying Wang, Tao Luo, Huawei Li, and Xiaowei Li
ACM Transactions on Design Automation of Electronic Systems
Qmlp: An error-tolerant nonlinear quantum mlp architecture using parameterized two-qubit gates
Cheng Chu, Nai-Hui Chia, Lei Jiang, and Fan Chen
2022 Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED)
Canopy: A CNFET-based Process Variation Aware Systolic DNN Accelerator
Cheng Chu, Dawen Xu, Ying Wang, AND Fan Chen
2022 Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED)
MOCCA: A Process Variation Tolerant Systolic DNN Accelerator using CNFETs in Monolithic 3D
Samuel J Engers, Cheng Chu, Dawen Xu, Ying Wang, and Fan Chen
2022 Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI)
HyCA: A hybrid computing architecture for fault-tolerant deep learning
Cheng Liu, Cheng Chu, Dawen Xu, Ying Wang, Qianlong Wang, Huawei Li, Xiaowei Li, and Kwang-Ting Cheng
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
RECOIN: A Low-Power Processing-in-ReRAM Architecture for Deformable Convolution
Cheng Chu, Fan Chen, Dawen Xu, and Ying Wang
2021 Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI)
A hybrid computing architecture for fault-tolerant deep learning accelerators
Dawen Xu, Cheng Chu, Qianlong Wang, Cheng Liu, Ying Wang, Lei Zhang, Huaguo Liang, and Kwang-Ting Cheng
2020 IEEE 38th International Conference on Computer Design (ICCD)
Multi-task Scheduling for PIM-based Heterogeneous Computing System
Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Xianzhong Zhou, Lei Zhang, Huaguo Liang, and Huawei Li
2020 Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI)