Research 

1. Hardware and Algorithms for Secure Computing Platforms:

(i) Novel algorithmic, microarchitectural and logic-level optimizations for high-performance, secure computing.

(ii) Hardware-level defense mechanisms for state-of-the-art, microarchitectural and circuit-level attacks on memory, processor and ML accelerators.

2. ML for Hardware Security: Novel ML applications such as -

(i) Autonomous frameworks/tools for optimal hardware configurations in a secure computing platform.

(ii) ML-assisted defense and attack. 

3. Logic & Microarchitecture for Emerging & Reconfigurable, Domain-Specific Accelerators  

1 PhD student position is available for Spring 2027. The candidates should have a bachelor degree in Electrical Engineering, Computer Engineering or other related fields. Ideal candidates should have strong backgrounds in digital design, computer architecture and should be proficient in Verilog/SystemVerilog & C++ language. Exposure to Xilinx FPGA platforms is desired and any experience with ML applications for Computer Architecture will be an advantage. Interested candidates should contact at rshadab@uidaho.edu with most updated CV/resume and standardized test scores.