Dean, School of Engineering, University of Kashmir
Director, Institute of Technology, Zakura Campus, University of Kashmir
Professor, Department of Electronics and Instrumentation Technology, University of Kashmir, Srinagar.
I am a Professor at the University of Kashmir. I have twenty-four years of experience teaching courses at undergraduate and postgraduate levels in computational electronics and about five years of industrial experience in computer training, consultations, servicing, and repairing electronic equipment.
I have been serving as Director of the Institute of Technology at the Zakura Campus of the University of Kashmir since April 2024.
I have headed the PG Department of Electronics and Instrumentation Technology at the University of Kashmir from February 2016 to August 2025.
I have supervised over 100 PG and UG major projects and 13 PhD and MPhil theses, edited seven books, published about 200 full-length articles as journal papers, conference proceedings, and book chapters, and given nearly 100 presentations in seminars and symposiums. Additionally, I have mobilized approximately INR 7.00 crore through funded research projects and schemes, introduced new academic programs and courses, established laboratories, and installed new equipment.
I have held key administrative and managerial positions, drafted statutes, placement brochures, and accreditation approval documents, and participated in institutional quality assurance, ranking, and admissions.
I have associations with reputed professional academic societies and publishing houses, and have organized over ten research events within and outside the country.
I have developed commercial software and Web applications and am proficient in using software for accounting, e-learning, simulations, data analysis, and publishing.
I believe in the emerging approach to education, where a teacher presents new information in the context of what students already know and helps them develop an understanding and skills through activities and reflection.
I love to explore and experiment with new technology and believe in self-learning, e-learning, life-long learning, and collaborations.
TEACHING: 24 Years; RESEARCH: 16 Years; INDUSTRY: 5 Years; ADMINISTRATIVE: 12 Years
THE UNIVERSITY OF KASHMIR, Department of Electronics and Inst. Technology.
PROFESSOR Sep 2019 – Current
Associate PROFESSOR Sep 2016 - Aug 2019 (In August 2012, I was appointed Associate Professor at the Central University of Kashmir; however, I continued in the parent University.)
ASSISTANT PROFESSOR (Stage III) July 2013 – Aug 2016
ASSISTANT PROFESSOR (Stage II) July 2008 – Aug 2013
ASSISTANT PROFESSOR July 2003 – Aug 2008
LECTURER May 2001 – July 2003
MAJOR HIGHLIGHTS
Played a leading role in ensuring the launch of two-year M.Tech. and four-year B.Tech programs in Electronics and Communication Engineering and Computer Science and Engineering at the University by drafting proposals, syllabi, statutes, and accreditation approval documents, and facilitating the establishment of new laboratories and equipment installations.
Drafted and presented departmental proposals for funds generation and mobilization from the University Grants Commission of India, including SAP (2012) and FIST (2002 and 2019), and the Department of Electronics and Information Technology, Govt. of India, including VPhD Scheme (2015, 2022, 2023, 2024, 2025).
Earned Excellent Grades for contributions to improving the quality of education in 2006.
Guided over 100 M.Tech., M.Sc., and B.Tech. students. Major Projects.
ADMINISTRATIVE RESPONSIBILITIES
August 2025 - present: Dean, School of Engineering, University of Kashmir (Additional Charge)
March 2024 - present: Director, Institute of Technology, Zakura Campus, University of Kashmir (Additional Charge)
March 2024 - present: Chairman, Center for Innovation, Incubation and Entrepreneurship (CIIE), Zakura Campus, University of Kashmir (Additional Charge)
March 2024 - present: Chairman, National Innovation Foundation (NIF), Srinagar (Additional Charge)
February 2016 – August 2025: Head, Department of Electronics and Instrumentation Technology.
2015 - present Nodal Officer for Visvesvaraya PhD Scheme for Electronics and Information Technology (VPhD Scheme) of MeitY, GOI in KU.
2016 - Present: Coordinator/Consultant DIQA, UoK.
2020 - Present: Coordinator/PI, DST FIST, GOI (Grant of 105 lacs).
2013 - 2019: Coordinator, UGC, SAP, DRS-Level I (Grant of Rs. 75.00 lacs).
2013 - 2018: Admission Committee (member), University of Kashmir.
Sep 2006 – 2016: Nodal Officer for Departmental Internal Quality Assurance
INDIRA GANDHI NATIONAL OPEN UNIVERSITY, New Delhi
PROJECT GUIDE July-2000 – present
ACADEMIC COUNSELLOR July 2000 – Dec 2003
MAJOR HIGHLIGHTS
MCA students (Guided over a dozen MCA Major Projects).
PG and UG Distance Education Programs.
MeitY (MINISTRY OF COMMUNICATIONS & INFORMATION TECHNOLOGY), New Delhi, Centre for Electronics Design & Technology of India, currently National Institute of Electronics and Inf. Tech. NIELIT, Srinagar/Jammu.
ASSISTANT ENGINEER Aug 1999 – May 2001
SENIOR TECHNICAL ASSISTANT Nov 1996 – Aug 1999
MAJOR HIGHLIGHTS
Provided Training in using Software to Government employees and consultancy services to overcome the Y2K problem faced by the General Post Office of Srinagar.
RADIX COMMUNICATIONS PVT. LTD, New Delhi
SYSTEM/NETWORK ENGINEER Jan 1995 – Nov 1996
MAJOR HIGHLIGHTS
Software installations, servicing & troubleshooting of communication equipment, computers and peripherals and installation of networks and training.
Ph. D. Electronics (E-mail Security) Feb 2011 (In-service)
Thesis: Design and Development of Efficient Techniques for Securing E-mail System from Threats, University of Kashmir.
M. Phil. Electronics (Network Security) July 2008 (In-service)
Dissertation: On the Design and Implementation of Efficient and Fast Network Protocols, University of Kashmir.
M. Sc. Electronics Sep 1995
Major Project: Simulation of Intel 8085 Microprocessor using C Language, University of Kashmir.
B. Sc. Non-Medical (Electronics) July 1991
Islamia College of Science and Commerce, University of Kashmir.
Advanced Diploma (Computer Science) DOEACC A Level July 2002 and Diploma (Computer Science) DOEACC O Level July 1998
National Institute of Electronics and Information Technology, Srinagar.
Competitive Examinations: UGC NET Dec 1997 and June 1998
National Eligibility Test (NET) for Lectureship (Electronic Sciences) conducted by the University Grants Commission, Government of India, in Dec 1997 and again in June 1998.
IELTS English language examination Jan 2020.
Publications
Full-Length Publications: 210, Published Abstracts: 90, Conferences and Seminars Attended: 80
Most of the publications in WOS, SCOPUS, and other major Indexes
Full-length publications are accessible from the publishers' websites, and links are available from my research profiles given in the Contact Address Section.
Funded Projects
FUNDED PROJECTS: 7 (~ INR 7 Crores)
The Ministry of Electronics and Information Technology (MeitY), Department of Science and Technology (DST), the University Grants Commission (UGC) of India, and various corporate houses, such as JK Bank, provided funding.
Areas of Interest
COMPUTATIONAL ELECTRONICS
Security in the Internet of Things (IoT), Processor Architecture for the Internet of Things
NETWORK SECURITY & FORENSICS
E-mail Security, Forensics, Classification, and Spam Control, Cyber Security and CAPTCHA Challenges, Cloud Computing and its Security, Digital Forensics
OTHER RESEARCH AREAS
E-learning, E-Governance, Social Media, Image Processing and Compression Techniques, Quantum Dot Cellular Automata
Other Highlights
Organized over ten research events within and outside the country.
Association with reputed professional academic societies and bodies.
PRODUCED Fifteen PhD and MPhil scholars, Guided over 100 PG (M. Tech, M.Sc., & MCA) and UG (BTech & BCA) major projects
I have taught various courses in electronics, computer and information technology at undergraduate and postgraduate levels.
COMPUTATIONAL ELECTRONICS
Processor Design, Microprocessors & Microcontrollers (Cortex M, Pic, Intel, etc.): Architecture, Programming and Interfacing, Computer Organization, Design & Architecture, Embedded System Design, Embedded Systems Security and Forensics, Digital Electronics, Digital Logic and Design.
NETWORKING & INTERNET
Internet of Things, networking and TCP/IP, data security, Network, Internet, E-mail & Web Security. Digital Forensics.
PROGRAMMING LANGUAGES
Programming and Problem-Solving, Assembly Language Programming, System Software and Operating Systems, OOP, Data Structures, DMBS.
LABORATORY COURSES
Component-level experimentations with courses in computational electronics. Simulation and emulation software, including OrCAD, Multisim, and Proteus. MDK Keil uVision, Simplicity Studio, MP Lab and various C compilers, Boards and kits from Keil, Silicon Labs, NXP, Texas Instruments and MicroElectronika, ULINK Pro, ULINK Plus, ULINK Me, PICkit 3/ICD 3 In-Circuit and Segger debug adaptors for IoT. FRED Workstation, Access Data FTK, Paraben DP2C and E3 Viewer, GSA CAPTCHA Breaker, CAPTCHA Snipper, CrypTool, etc. for forensics. Performed laboratory experimentation through multiple programming languages, including MS Visual Studio.Net (VB.NET, ASP.NET, C#.NET, J#.NET), Visual C++/VB, COBOL, C/C++, PASCAL, JAVA with Borland JBuilder, Data Structures through C/C++/JAVA, etc. I Have also used Oracle, MS SQL Server, and MS Access in many projects and research works.
"Send an Email to SGRMTB@YAHOO.COM to access MY TEACHING MATERIAL"
Looking ahead to my new roles and additional responsibilities, I intend to use my teaching and training skills, research, academic, technical and administrative experiences, professional and personal contacts and position with a commitment to enhancing diversity, equity and inclusion. I shall continue to incorporate diversity into my teaching courses, materials and methods and conduct active research that contributes to the practical wisdom of applied knowledge and enhances the learning experience.
I will demonstrate my commitment to dedicated service to the institutional and educational purpose and acceptance of the ideas of the University.
While strengthening my knowledge of existing courses taught by me, I plan to design and prepare additional courses such as FPGA-based processor design, lightweight cryptography, forensics in the Internet of Things, cloud and fog computing, cyber security, AI and medical and social applications of the Internet of Things.
I also plan to use additional hardware modules such as Texas Instruments SimpleLink DK/STK, CC2650, CC3200 based boards, UP2 Grove IoT development kit, DesignStart SoC Design Education kit from ARM, Arm MPS3+ FPGA Prototyping boards for prototyping of Cortex M processor cores, Libelium Waspmote Mote Runner, Libelium communication modules, and additional sensor boards. I also plan to use DS 5 PRO, and DS-5 debug probes, including D-Stream, a high-performance debug and trace probe, DSTREAM-ST Debugger, I-jet Trace for Arm Cortex-M, I-jet, and I-scope for high-resolution power and energy analysis.
In the research domain, I plan to work on addressing IoT research challenges for security at different layers, Quantum-resistant cryptographic algorithms for the Internet of Things, improve security protocols and classification efficiency of filters, continue working further towards building secure CAPTCHA challenges, investigate persistent and volatile evidence in the digital forensic domain and explore applications of Internet of Things, particularly for NTDs.
I am committed to continuing my research endeavours, including undertaking funded projects and working in research groups. I am open to research collaborations and interdisciplinary research projects.
Vint Cerf (Vice President, Google Inc), famously known as the father of the Internet for his co-invention of the TCP/IP protocol, wrote the foreword for my edited book in 2019.
RECEIVED appreciation award from Honourable Vice-Chancellor, best paper presentation awards.
PARTICIPATED as Vice-Chancellor’s nominee at various forums. On Editorial boards of various reputed journals and conferences, etc.
HELD ADMINISTRATIVE POSITIONS and mobilized funds, introduced new academic programmes and courses, established laboratories, installed equipment, drafted statutes, placement brochures, and accreditation approval documents; and participated in institutional quality assurance, ranking, and admissions.
PARTICIPATION in Technical, selection, central purchase, and admission advisory committees, DIQA steering, placement, DRC, BORS, etc.
DEVELOPED over 20 software packages, including a provident fund management package for SKUAST and various conference websites.
ATTENDED over a dozen subject-related refresher and orientation courses.
PARTICIPATED in and attended over 80 conferences within and outside the country.
SUPERVISED over 100 PG and UG major projects.
DELIVERED invited lectures and participated in panel discussions and session chairs in reputed research events.
IEEE, NJ, USA, Computer Society of India, ACM, New York, USA, IAE, Hong Kong, China, CSTA, NJ USA, Internet Society, VA, USA, IACSIT, Singapore, MIR Labs, USA, CSST, Gent, Belgium, SIO, New York, USA, ADFSL, Virginia, USA, SDIWC, USA.
On Editorial Boards of various reputed Journals.
I prefer editorial writing and reading, and I am an active member of academic debate teams. I have a passion for high terrain driving, chess, table tennis and the like. I spend my leisure time with family and friends. Sometimes, I meditate to get away from daily stress and refresh.
Institute of Technology, Zakura Campus
University of Kashmir, Srinagar, India
Department of Electronics and Instrumentation Technology
University of Kashmir, Srinagar, India
Mobile / WhatsApp / IMO / Telegram / BOTIM / SMS: (+91) 94 1954 8922
E-MAIL: sgrmtb@yahoo.com, sgrmtb@gmail.com, sgrmtb@kashmiruniversity.ac.in
SKYPE ID: tariq.banday
"Send an Email to SGRMTB@YAHOO.COM to access MY TEACHING MATERIAL."
Links to my third-party research profiles
Five-Year Integrated Master's Programme in Electronics
Video message to the AICTE for the AICTE Idea Lab