Publications

Journal Articles 

1. A. Naseer, K. Nandan, M. Rafiq, A. Agarwal, S. Bhowmick, and Y. S. Chauhan, "Harnessing Gaussian-like transfer characteristics for ultra-efficient computation in monolayer two-dimensional devices," Physical Review Applied, Vol. 23, Issue 4, pp. 044026, Apr. 2025. 

2. K. Nandan, A. Naseer, A. Agarwal, S. Bhowmick, and Y. S. Chauhan, "Transistors based on Novel 2-D Monolayer Semiconductors Bi2O2Se, InSe, and MoSi2N4 for Enhanced Logic Density Scaling", IEEE Transactions on Electron Devices, 2025.

3. A. Naseer, M. Rafiq, S. Bhowmick, A. Agarwal, and Y. S. Chauhan, "Harnessing Room-Temperature Ferroelectricity in Metal Oxide Monolayers for Advanced Logic Devices," Journal of Applied Physics, Vol. 136, Issue 17, pp. 174301, Nov. 2024.

4. M. S. Nazir, A. Naseer, S. A. Ahsan, and Y. S. Chauhan, "A Unified Charge-based SPICE-Compatible Flicker Noise Model for 2D-Material FETs", IEEE Transactions on Electron Devices, Vol. 71, Issue 10, pp. 6452-6455, October 2024.

5. A. Naseer, A. Priydarshi, P. Ghosh, R. Ahammed, Y. S. Chauhan, S. Bhowmick, and A. Agarwal, "Room Temperature Ferroelectricity and Electrically Tunable Berry Curvature Dipole in III-V Monolayers," Nanoscale, Vol. 16, Issue 25, pp. 12107-12117, 2024.

6. A. Naseer, K. Nandan, A. Agarwal, S. Bhowmick, and Y. S. Chauhan, "Performance Evaluation of Monolayer ZrS3 Transistors for Next-Generation Computing", IEEE Transactions on Electron Devices, Vol. 70, Issue 10, pp. 5435-5442, October 2023.

7.  A. Naseer, K. Nandan, A. Agarwal, S. Bhowmick, and Y. S. Chauhan, "Di-Metal Chalcogenides: A New Family of Promising 2-D Semiconductors for High-Performance Transistors", IEEE Transactions on Electron Devices, Vol. 70, Issue 5, pp. 2445-2452, May 2023. 

8. K. Nandan, A. Naseer, and Y. S. Chauhan, "Field-Effect Transistors based on Two-dimensional Materials," Transactions of the Indian National Academy of Engineering, Vol. 8, Issue 1, pp. 1 - 14, March 2023.

Conference Papers

1. A. Naseer, S. Yadav, S. Bhowmick, A. Agarwal, Y. S. Chauhan, "Steep-Slope Field-Effect Transistors Enabled by 2D Material-based Heterostructures", IEEE International Conference on Emerging Electronics (ICEE), Bengaluru, Dec. 2025.

2. Y. H. Zarkob, M. S. Nazir, A. Naseer, A. Pampori, C. K. Dabhi, D. Rajasekharan, Z. Chaosong, L. S. Ee, C. Hu, and Y. S. Chauhan, "Characterization and Modeling of Flicker Noise in Bulk MOSFETs down to Sub-Threshold Regime", International Compact Modeling Conference (ICMC), San Francisco, June 2025.

3. A. Naseer, Y. H. Zarkob, M. Rafiq, M. S. Nazir, O. Ahmad, A. Agarwal, S. Bhowmick, and Y. S. Chauhan, "Enhancing the Capabilities of Quantum Transport Simulations Utilizing Machine Learning Strategies", ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD), Snowbird, USA, Sept. 2024.

4. A. Naseer, K. Nandan, A. Agarwal, S. Bhowmick, and Y. S. Chauhan, "Hybrid FETs Based on Monolayer ZrI2 for Energy-Efficient Logic Applications", 82nd Device Research Conference (DRC), Washington DC, USA, June 2024.

5. A. Naseer, S. Bhowmick, A. Agarwal, and Y. S. Chauhan, "Monolayer HfS3: A Potential Candidate for Low-Power and High-Performance Field-Effect Transistors", IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Bengaluru, India, March 2024. 

6. A. Naseer, K. Nandan, S. Bhowmick, A. Agarwal, and Y. S. Chauhan, "Energy-Efficient Logic Switches Designed by Combining Band-to-Band Tunneling and Thermionic Injection in 2-D Semiconductors", IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Bengaluru, India, March 2024.

Book Chapters

1. Title: Progress in Two-dimensional Ferroelectrics and Potential Applications in the book 2D Semiconducting Materials for Electronic, Photonic, and Optoelectronic Devices 

Authors: Ateeb Naseer, Yogesh Singh Chauhan, Amit Agarwal, and Somnath Bhowmick

Publisher: CRC Press, ISBN: 9781003439448, Year: 2024