Embedded Files
Term: Fall
Term: Fall
Level: Undergraduate (Senior)
Level: Undergraduate (Senior)
Embedded systems properties. Embedded processing platforms. Parallel input and output. Time measurement. Waveform generation; pulse and period measurement. Data acquisition and sensors. Device control and actuators. Asynchronous and synchronous serial communication. Interrupts. Basic embedded software techniques. Techniques for low-power operation. Design with contemporary tools. Laboratory. Prerequisites: CMPE 344.
CmpE446: Introduction to Computer Architecture
CmpE446: Introduction to Computer Architecture
Term: Spring
Term: Spring
Level: Undergraduate (Senior)
Level: Undergraduate (Senior)
Microarchitecture. Instruction Set Architecture (ISA). Computer Arithmetic. In-order and Out-of-order Execution. Dataflow. Memory hierarchy and coherence. Parallelism. Domain Specific Computing. Design with contemporary tools. Prerequisites: CMPE 344.
CmpE511: Computer Architecture
CmpE511: Computer Architecture
Term: Spring
Term: Spring
Level: Graduate
Level: Graduate
Design and analysis fundamentals. Instruction set architecture. Parallelism: instruction-level, data-level, thread-level. Memory hierarchy. Interconects . Domain specific architectures. Prerequisites: Consent of the Instructor
CmpE59L: Real-time Embedded Systems
CmpE59L: Real-time Embedded Systems
Term: Spring
Term: Spring
Level: Graduate
Level: Graduate
Properties of real-time embedded systems. Measurement of time. Synchronization. Interfacing. Temporal accuracy. Determinism. Dependability. Real-time scheduling policies and feasibility tests. Real-time communication. Real-time operating systems. Performance analysis. Prerequisites: Consent of the Instructor
CmpE590: Domain Specific Architectures
CmpE590: Domain Specific Architectures
Term: Spring
Term: Spring
Level: Graduate
Level: Graduate
Background on Parallelism: Data-Level Parallelism, Shared Memory Architectures,
On-chip Communication Networks. Models for Performance Evaluation. Memory-Centric Architectures. Hardware Accelerators. Programmable Accelerators. Heterogeneous Architectures. Domain Specific Languages and Compiler Optimizations. Case study: Domain Specific Architectures for Artificial Intelligence and Machine Learning. Prerequisites: Consent of the Instructor
Page updated
Google Sites
Report abuse