Pursuing B.Tech in Electronics and Communication Engineering, National Institute of Technology - Durgapur, Paschim Burdwan - 713209, India.
As a third-year undergraduate student of Electronics and Communication Engineering, I want to explore the research-oriented fields mainly related to VLSI, digital circuit designing or hardware modelling using Verilog or any other hardware description language.
JULY 2017 - PRESENT: BACHELOR OF TECHNOLOGY (B. TECH), NATIONAL INSTITUTE OF TECHNOLOGY, DURGAPUR, Electronics and Communication Engineering; CGPA: 9.64
MAY 2014 – MAY 2016: HIGHER SECONDARY, BURDWAN MUNICIPAL HIGH SCHOOL.
APRIL 2008 – MAY 2014: SECONDARY, BURDWAN TOWN SCHOOL.
Topic: STABILITY ANALYSIS OF FRACTIONAL CIRCUITS ,
Guide: Prof. Jagmohan Tyagi, IIT GANDHINAGAR
Report: Report
The existence and stability analysis of fractional circuits which are governed by fractional ordinary differential equations. Review the existence and stability analysis of such fractional order differential equations.
The immense computation and huge memory requirement are challenging the computation efficiency of today’s systems. There have always been certain major bottlenecks in the conventional architectures. The project deals in using Network-on-Chip for Spiking Neural Networks, having a highly parallel architecture useful for the neuromorphic computing systems. The use of NoC benefits the scalability, throughput and speed of the designed architecture. The architecture is first simulated using Icarus Verilog and Vivado tools, then synthesized in Synopsys Design Compiler and the NoC parameters was analyzed using NOXIM.