Domain: Physical Design, FPGA Design, STA, Signoff checks, Low power circuit design, CMOS and beyond CMOS : CNTFET,FinFET Technology based circuit design and analysis.
EDA Tools: -
Synopsys Design Compiler, ICC2 : Floorplan, Powerplan, Placement,CTS, Routing - Signoff - StarRC, IC Validator, Primetime STA
Simulation Tools ng-Spice, H-spice - Mentor Graphics: S-edit, L-edit; - Microwind, DSCH 3.9
NI MultiSim 14.1, MATLAB R2021a, Proteus, Eagle, easyEDA
Hardware: FPGA Spartan 6,Vertex,Zynq board, PIC Microcontroller, Arduino , Raspberry Pi, PLC FX 5U
Xilinx ISE 14.1,Vivado 2016.4 (Synthesis and analysis of HDL Designs)
RTL2GDS using OpenLANE
Machine Learning and Artificial intelligence algorithms
Programming Language/scripting: C, C++, Core Java, Python,Javascript , TCL
“Stability and Power Analysis of Schmitt Trigger based low power SRAM bitcell using CMOS and CNTFET technology at 22nm technology node”, 11th international conference on nanostructures, nanomaterials and nanoengineering, Tokyo,Japan,November 26-28, 2022
"The Stability Performance Analysis of SRAM Cell Topologies in 90nm and 130nm CMOS technology," 2021 International Conference on Emerging Smart Computing and Informatics (ESCI), (IEEE Xplore) 2021, pp. 733-736, doi: 10.1109/ESCI50559.2021.9396973.
Driver Assistance System Using Image Processing And Deep Learning Algorithm , International Journal For Technological Research In Engineering, Volume 7, Issue 10, June-2020, ISSN (Online): 2347 – 4718
Machine Learning Approach for Crop Yield Improvement using Plant Leaf Disease Detection”, International Research Journal of Engineering and Technology (IRJET) Volume 7, Issue 4, April 2020 S.NO: 936
“Object Detection and Recognition for Blind Assistance”, International Research Journal of Engineering and Technology (IRJET), Volume: 06 Issue: 05 | May 2019, p-ISSN: 2395-0072, e-ISSN: 2395-0056.
“Chemical Mixing for Process Industry Using PLC & SCADA” International journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, vol.7, Issue 4, April 2018
“Read stability and read failure analysis of low voltage Schmitt Trigger based SRAM bit cell,” International Journal of Engineering Research and Applications, Vol. 3, Issue 1, January -February 2013, pp.876-879.
“Read stability and Write ability analysis of different SRAM cell structures,” International Journal of Engineering Research and Applications Vol. 3, Issue 1, January -February 2013, pp.1073-1078.
Design and Execution procedure of Laboratory Experiments of the course Mechatronics
Design and Execution procedure of Laboratory Experiments of the course System Programming & Operating System
Key Projects
VLSI, Low Power and Physical Design Projects:
CHIPTOP : Block Level Physical Design, (2022) Technology -16nm CMOS process Node, macros-04, Metal Layers:09
Falcon: Block Level Physical Design, (2022) Technology -22nm CMOS process Node, macros-16, , Metal Layers:09
JBI: Synthesis, PNR and STA of the block, (2022) Technology -16nm, Macros: 46, Metal Layers:09
DTMF: Block Level Physical Design, (2022) Technology -22nm CMOS process Node, macros-16, , Metal Layers:09
Stability and Speed performance analysis of CMOS and FinFET based 10T SRAM bit-cell topology in 90nm, 7 Months (2019)
10 bit DAC Design using esim and sky130 (August 2022), 1 Month The schematic entry is done in esim to check the functionality of the DAC circuit. The PDK sky130 is used for development of the DAC. The ngspice is used for prelayout and post layout simulation. The layout is designed in magic tool.
Technology Scaling Impact on Behavioral performance analysis of Static RAM. (July2022-Present) Technology: 22nm and 16nm Cmos process node Analyzing the impact of scaling on the performance parameters – speed, power and noise margin. Effect of power scaling to verify the robustness of the design in nanometer regime. Microwind and DSCH is used for layout and simulation. The results are validated in synopsys Hspice.
FPGA Based Uni-Card for accessing ATM, Driver’s License and RC book
Other Projects(Machine Learning and Automation)
Onion Grader in association with innovative solutions india pvt ltd
CNN based Machine Vision for fruit quality detection
Traffic Decongestion and parking solution using Raspberry pi
A secure IoT Based Modern Healthcare system
Smart automotive car to car communication using wireless technology
Machine Learning based Object Detection and Recognition for Blind Assistance
Machine Learning Approach for Crop Yield Improvement using Plant Leaf Disease Detection
Design and implementation of SCARA Robot
Reviewer for Third International Conference on Computing, Communication, Control and Automation 2017, track VLSI Embedded Systems organized by Pimpri Chinchwad College of Engineering & Technically Sponsored by IEEE Pune Section.
Reviewer for fifth International Conference on Computing, Communication, Control and Automation 2019, track Automation Syatems organized by Pimpri Chinchwad College of Engineering & Technically Sponsored by IEEE Pune Section.
Seminar on ‘IPR – Application and process’ at PES’s Modern College of Engineering, Shivaji Nagar, Pune on 8th June 2017.
Deliver lecture on “Insights on Patent Filing” at Electronics and Telecommunication Department PES’s Modern College of Engineering, Pune on 23rd Feb 2018.
Deliver guest lecture on “ Patent Awareness and its commercialization aspect” at IT Dept. PCCOE, Nigdi
Deliver guest lecture on “Turning idea into IP” at PG (E&Tc) Dept. PCCOE Nigdi.
PROFESSIONAL MEMBERSHIP:
IEEE Electron Devices society , IEEE Signal processing Society, IEEE Sensors Council,
IEEE Nanotechnology Council, IEEE Council on Electronic Design Automation
ISRD(International Society for Research and Development)
InSC ( Institute of Scholars)
Design and Simulation of Low Power Integrated Circuits using H-spice at Deep Submicron Technology at PCETS PCCoE Pune-44
Certification program on “Full Custom ASIC Design and Verification” organized by Sandeepani School of Embedded System Design , Bangalore,,26-28 May 2021
SoC Design using Open source EDA Tools|1 Week, organized by E & ICT IIT Guwahati in association with VLSI system design Pvt. Ltd.
Hardware Modeling using Verilog | NPTEL India | 12Weeks
Applied Machine Learning using Python conducted by Tech SMART systems | 28th Sept 2020 to 2nd Oct 2020
Hands on Training program on Mechatronics Lab Experiments with Virtual Environment| One Week| Oct 2020
Training course in FX-5U PLC and GS HMI Basics at Innovative Solutions, Channel partner of Mitsubishi Electric, Bhosari, Pune | Duration 4 weeks
Training workshop on “Internet of Things” organised by Pimpri Chinchawad college of Engineering in association with Microsoft training academy on 26th 27th and 28th August 2017 at Pimpri Chinchawad college of Engineering Nigdi, Pune.
Training on “Development of Mechatronics Systems using Arduino – A Project Based Learning Approach” on 18th -20th August 2017 at Pune Institute of Computer Technology, Pune-Satara Road, Dhankawadi, Pune-411043.
Google Scholar Link: https://scholar.google.com/citations?user=ASTDpbwAAAAJ&hl=en&authuser=2