Anugrah Jain, Vijay Laxmi, Manoj Singh Gaur and Ashish Sharma, "An improved reconfiguration algorithm for handling 1-point NoC failures", Microprocessors and Microsystems (Elsevier): 104910, September 2023.

Anugrah Jain, Vijay Laxmi, Meenakshi Tripathi, Manoj Singh Gaur and Rimpy Bishnoi, “TRACK: An Algorithm for Fault-Tolerant, Dynamic and Scalable 2D Mesh Network-on-Chip Routing Reconfiguration”, Integration The VLSI Journal 72: 92-110 (Elsevier), May 2020.

Anugrah Jain, Vijay Laxmi, Meenakshi Tripathi, Manoj Singh Gaur and Rimpy Bishnoi, “S2DIO: An Extended Scalable 2D Mesh Network-on-Chip Routing Reconfiguration for Efficient Bypass of Link Failures”, The Journal of Supercomputing 75(10): 6855-6881 (Springer), October 2019.

Anugrah Jain, Nitin Purohit and Sushil Chandra Jain, “An extended approach for online testing of reversible circuits”, IOSR Journal of Computer Engineering 1(16): 1-11, January 2014.

Anugrah Jain, Vijay Laxmi, Meenakshi Tripathi, Manoj Singh Gaur and Rimpy Bishnoi, “Performance-Enhanced d2 -LBDR for 2D Mesh Network-on-Chip”, In Kaushik B., Dasgupta S., Singh V. (eds) VLSI Design and Test. VDAT 2017, Communications in Computer and Information Science, pages 313-323, vol 711, Springer, Singapore, June 2017.

Anugrah Jain and Sushil Chandra Jain, “Towards Implementation of Fault Tolerant Reversible Circuits”, In 2013 1st International Conference on Emerging Trends and Applications in Computer Science, pages 86-91, IEEE, September 2013.

Anugrah Jain and Sushil Chandra Jain, “Fault Tolerant Synthesis of Reversible Circuits”, LAP Lambert Academic Publishing, ISBN 978-3-659-67914-8, pages 1-104, 2015.