Agile and Open Hardware for Next-Generation Computing
Room 104B, June 23rd, 2019 in Phoenix, Arizona.
Co-located with ISCA’2019
(ISCA’2019 is a part of ACM Federated Computing Research Conference.)
Overview
A Golden Age. Moore’s Law, after transforming our world for more than 50 years, has finally started to slow down. John Hennessy and David Patterson welcomed this trend in their Turing Award lecture as this slowdown will bring about a new golden age of computer architecture. Since achieving continued performance improvements through transistor scaling provides less economic benefit, the computing industry must increasingly rely on vertically integrated solutions with domain-specific accelerators to continue improving computing performance. However, the high engineering cost, including tools, labor, and IPs, has prohibited the wide adoption of specialized architectures for all applications except a few designs that can amortize the high cost.
Been There, Done That. Compared to the hardware industry, the software community has embraced agile software development and open-source software design for decades. In fact, open-source software has become a critical component of today’s major software infrastructure. As a result, a small team of software developers can leverage a rich ecosystem of reusable, open-source components and use high-level abstractions to realize their innovative ideas quickly. This has significantly reduced the engineering cost, shortened the design cycles, and enabled the proliferation of software startups.
Time to Dive In. Agile and open hardware design is one of the most promising ways to lower the design cost and sustain the future computing performance growth. Agile hardware design abstracts hardware implementation to a higher level and enables fast iterations of continuous hardware development. Open source hardware provides a pool of off-the-shelf components that enables further system-level integration. We believe the architecture and system community should take the leadership role of realizing agile and open hardware design.
Goals
- Advocate for the system and architecture community to make agile and open-source design a centerpiece of the academic enterprise.
- Share the successful experience from software community on initiating and managing open-source software projects.
- Introduce ongoing efforts in systems, architecture, and EDA communities on agile and open hardware design.
Schedule
- 9:00 am - 9:05 am, Organizers
- 9:05 am - 9:35 am, David Patterson, UC Berkeley/Google, A New Golden Age for Computer Architecture [slides]
- 9:35 am - 10:05 am, Vivienne Sze, MIT, Domain-Specific Architectures for AI and Robotics: Opportunities and Challenges [slides]
- 10:05 am - 10:35 am, Serge Leef, DARPA, Automatic Implementation of Secure Silicon [slides]
- 10:35 am - 11:05 am, Andrew Kahng, UCSD, Bringing Design Technology and Architecture Closer Together: What Open Source Might Enable [slides]
- 11:05 am - 11:30 am, Coffee Break
- 11:30 am - 12:00 pm, Yungang Bao, Chinese Academy of Sciences, The Four Steps to An Open-Source Chip Design Ecosystem [slides]
- 12:00 pm - 12:30 pm, Richard Ho, Google, Building A Sustainable Open-Source Hardware Ecosystem [slides]
- 12:30 pm - 2:00 pm, Lunch Break
- 2:00 pm - 2:30 pm, Mark Horowitz, Stanford, AHA! – Agile HArdware [slides]
- 2:30 pm - 3:00 pm, Jason Cong, UCLA, Democratize Customizable Computing [slides]
- 3:00 pm - 3:30 pm, Brucek Khailany, NVIDIA, Machine-Learning-Assisted Agile VLSI Design for Machine Learning [slides]
- 3:30 pm - 4:00 pm, Coffee Break
- 4:00 pm - 4:30 pm, Borivoje Nikolić, UC Berkeley, Generating the Next Wave of Custom Chips [slides]
- 4:30 pm - 5:00 pm, Adam Chlipala, MIT, Strong Formal Verification Across a Hardware-Software Stack with RISC-V [slides]
Organizers
- Christopher Batten, Associate Professor, Cornell University
- Yunsup Lee, Chief Technology Officer, SiFive
- Yakun Sophia Shao, Research Scientist, NVIDIA