AES Encryption

AES Encryption -- Advanced Encryption Standard

~A deep-dive into the Advanced Encryption Standard and how to implement it using principles of computer architecture~

AES (The Advanced Encryption Standard) is a cryptographic method used to protect sensitive information. The algorithm uses the same key for encrypting and decrypting (symmetric key), thus requiring that the sender and receiver both know the code. The encrypted information is called "ciphertext," and is unreadable. The decrypted, actual readable message is called "plaintext."

The specification standards of AES were published in 2001 by the U.S. National Institute of Science and Technology. AES typically uses 128 bit, 192 bit, or 256-bit keys. For our implementation, we used 128 bits, but the process is quite similar to the other key sizes.

We decided to pursue the implementation of AES for our Computer Architecture final project because it applies principles of computer architecture in a way we had not previously explored in class. The real-world application of computer architecture for AES is less direct than CPU design. We were excited about AES's use to secure government classified documents, in file compression programs, etc. The algorithm itself is intriguing because it is relatively simple in concept, and because of its symmetrical, yet fairly secure properties.

The journey to implementing encryption was fairly smooth after we got an understanding of what the different steps in the algorithm do. Despite the decryption process because almost a direct inverse, of encryption, we found decryption to be a bit more challenging. We found that the resources on decryption are much more sparse.

As a whole, we feel like this project was well-scoped, and a good culmination of our computer architecture knowledge acquired over the semester. We feel comfortable with AES now, and more confident in using Verilog. We divided the project into three sections, which worked fairly well for us. We spent one week making the individual AES operations, then one week integrating them into an encryption file and inversing them to decrypt, and the third week polishing and focusing on presentation. If we were to have continued with this project, we would have loved to have made a python GUI to handle the encryption without a terminal. Another avenue we were interested in pursuing was FPGA implementation of our AES Verilog.

Anna Griffin and Grace Montagnino

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