Read Section Control Block Design of [1, p136];
Read Example 3.7 of [1, p 136-7];
Implement the circuit of Fig. 3.50 of [1, p137] following the steps descibed in Clip 1 using Logisim; and
Evaluate the circuit operation.
Clip 1. Controller design with Logisim.
Using Logisim, implement the circuit for the Button press synchronizer of Example 3.9 of {1, p139-40] and evaluate its operation (use scope);
Using Logisim, implement the circuit for the Sequence generator of Example 3.10 of {1, p140-1] and evaluate its operation (use scope);
Using Logisim, implement the circuit for the Secure car key controller of Example 3.11 of {1, p141-2] and evaluate its operation (use scope).
Read Example 3.12 of [1, p142-3];
Using Logisim, implement the circuit of Fig. 1 that corresponds to the combinarional logic of Fig. 3-59;
After implementing, obtain the true-table selecting Project / Analise Circuit / Table in Logisim;
Compare the true-table obtained in Logisim with Table 3.6 of [1, p143].
Finally, draw the FSM diagram following the steps of Fig. 3.60 of [1, 143].
Fig. 1. Combinational logic of a circuit with unknown behavior, addapted from Fig. 3-59 of [1, p142].
Obtain the FSM diagram of Exercice 3.46 of [1, p164].
Read Section State Reduction of [1, p335-9];
Regarding Fig. 6.35 of [1], Fig. 2 shows the original FSM;
Fig. 3 show the steps of the Algorithm for State Reduction of Table 6.2 of [1] ;
In Fig. 4 are shown the information after checking the next states for each input value and the reduced FSM.
Fig. 2. Original FSM , adapted from Fig. 6.35 de [1, p336]
Fig. 4. Tables of pairs of states; (a) original table, (b) Table in which states different outputs was marked, (c) Table with next states for S2 e S0 for x=1 and x=1, respectively, and (d) Table with next states for S1 e S3 for x=1 and x=1, respectively.
Fig. 4. Table with reduced states and Reduced FSM.
Read Example 6.13 of {1, p339];
Solve Exercise 6.16 of [1] .
Read Section Alternative Minimum-Bitwidth Binary Encodings of [1, p342];
Read Example 6.14 of [1, p343] and compare the Fig 6.42 of the book with Fig. 5 below;
Follow the next steps for Controller Design Process of Table 3.2 {1, p136].
Fig. 5. Uncomplete states diagrams. (a) Diagram state with binary encoding, and (b) Diagram state with alternative encoding.
Read Section One-Hot Encoding of [1, p343];
Read Example 6.15 of [1, p343] and compare the Fig 6.43 of the book with Fig. 6 below;
Follow the next steps for Controller Design Process of Table 3.2 {1, p136].
Fig. 6. Uncomplete states diagrams. (a) Diagram state with binary encoding, and (b) Diagram state with One-Hot Encoding.
Read Section Output Encoding of [1, p345];
Read Example 6.17 of [1, p345] and compare the Fig 6.47 of the book with Fig. 7 below;
Follow the next steps for Controller Design Process of Table 3.2 {1, p136].
Fig. 7. Uncomplete states diagrams. (a) Diagram state with binary encoding, and (b) Diagram state with Output Encoding.
Using Logisim, implement the circuit of Example 6.15 of [1, p342] and evaluate its operation;
Using Logisim, implement the circuit of Example 6.16 of [1, p342-3] and evaluate its operation;
Using Logisim, implement the circuit of Example 6.17 of [1, p344-5] and evaluate its operation;
Using Logisim, implement the circuit of Example 6.18 of [1, p345-6] and evaluate its operation;
Solve Exercises 6.19-6.21 of [1, p390].
Read Section Moore versus Mealy FSMs od [1, p346-9];
Compare Fig. 6.50 and Fig. 6.51 with Fig. 8 below.
Using Logisim, implement the circuits of FSMs Moore and Mealy for the soda dispenser machine of Fig. 6.50 of [1, p348]
[1] Vahid, Frank; Sistemas digitais: projeto, otimização e HDLs
Library ID: 621.382:004 V127s
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