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General information
General information
- Course name: Elements of digital logic (Elementos de lógica digital)
- Undergraduate school: Computer science
- Credits: 4
- Hours per semester (h): 45
- Lecture (h): 30
- Laboratory (h): 15
Schedule information
- Introduction to the Elements of digital logic and digital systems
- Numeric systems and codification
- Combinational logic, logic gates, transistors and logic families
- Boolean algebra and simplifying of logic expressions
- Circuits for (de)coder and (de)mux
- Sequential logic, latch and flip-flops
- Operational blocks, registers and counters
- Digital arithmetic, adders, shift registers, and multipliers
Bibliography
Bibliography
- [1] Tocci R, Sistemas digitais, princípios e aplicações, 11 ed. Prentice Hall, 2011 (library identifier: 621.382:004 T631s 11.ed.)
- [2] Floyd T, Sistemas digitais: fundamentos e aplicações, 9 ed. Bookman, 2007 (li: 621.32 F645s 9.ed.)
- [3] Wakerly J, Digital design: principles and practices, (link*), Prentice Hall, 2006 (li: 621.382 W149d 4.ed.)
- [4] Vahid F, Sistemas digitais: projeto otimização e HDLs, Bookman, 2008 (li: 621.382:004 V127s)
*: link to online available resources
Semester 2019-1
Semester 2019-1
Tuesday: 07:00 (2h) at room S03 of wing 03
Friday: 10:40 (1h) at LB-DCEL of wing 03
Schedule in detail (link)
Moodle platform - AVA (link)
First part
First part
Content
Content
- Introduction to Elements of digital logic
- Digital and Analog Systems
- Digital Circuits and Logic Circuits
- Transmission, Memory and Digital Computers
- Numerical systems, conversions
- BCD and Alphanumeric Codes
Reading in home
Reading in home
- Introduction of Chapter 1 and Sections 1.1-1.9 of [1]
- Introduction of Chapter 2 and Sections 2.1-2.4, 2.6-2.8 of [1]
Exercises
Exercises
- Problems 1.1-1.15 of [1]
- Problems 2.1-2.36 of [1]
First exam: April 13th
Second part
Second part
Content
Content
- Introduction to combinational logic
- Logic Gates (N)AND, (N)OR, NOT
- Truth Tables and logic circuits
- Boolean algebra and Simplifying Logic Circuits
- Designing Combinational Logic Circuits and Karnaugh
- (de)coder and (de)mux
Reading in home
Reading in home
- Introduction of Chapter 3 and Sections 3.1-3.13 of [1]
- Introduction of Chapter 4 and Sections 4.1-4.8 of [1]
Exercises
Exercises
- Problems 3.1-3.32 of [1]
- Problems 4.1-4.38 of [1]
Second exam: May 28th
Third part
Third part
Content
Content
- Introduction to sequential logic
- Latchs
- Flip-flops and Applications
- Data Storage and Transfer
- Frequency Division and Counting
- Registers and (a)synchronous Counters
- Project of sequential logic
Reading in home
Reading in home
- Introduction of Chapter 5 and Sections 5.1, 5.2, 5.4-5.10, 5.13-5.18 of [1]
- Introduction of Chapter 6 and Sections 7.1-7.6 of [1]; and Sections 2.1 and 2.2 of [4]
Third exam: July 2nd
Final exam: July 16th
Course project
Course project
Background
Background
First, second and third parts of the course and the following items:
- System of 2’s Complement and Signed Numbers
- Addition and Subtraction of Binary Numbers
- Multiplication and Division of Binary Numbers
- Arithmetic Circuits
- Design of a Full Adder
- Complete Parallel Adder with Registers
Statement
Statement
By using Logisim, project and simulate a digital circuit of a 4-operations Calculator (additio, subtraction, multiplication and division)
Reading in home
Reading in home
- Introduction of Chapter 6 and Sections 6.1-6.15 of [1]
Class 1:
Class 1:
- Class 1: Introduction to elements of digital logic (1); schedule
- Class 2: Introduction to elements of digital logic (2); schedule
- Class 3: Introduction to elements of digital logic (3); schedule
- Class 4: (1); schedule
Relevant readings
Relevant readings
Peligrini C, Claude Elwood Shannon e A Symbolic of Relay and Switching Circuits: tornando um computador uma máquina semiótica, Revista de comunicação e cultura, v7, n1, 2006 (pdf)
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