Embedded Files
General information
General information
- Requisites: Digital circuits (Eletrônica digital)
- Credits: 4
- Hours per semester (h): 60
- Lecture (h): 45
- Laboratory (h): 15
Schedule information
Schedule information
- Introduction
- Introduction to memories
- A/D converters
- Programmable logic devices (PLD)
- Hardware description languages (HDL)
- Digital systems projects
Bibliography
Bibliography
- [1] Tocci R, Sistemas digitais, princípios e aplicações, 11 ed. Prentice Hall, 2011 (cb: 621.382:004 T631s 11.ed.)
- [2] Floyd T, Sistemas digitais: fundamentos e aplicações, 9 ed. Bookman, 2007 (cb: 621.32 F645s 9.ed.)
- [3] Chu P, FPGA prototyping by VHDL examples, Wiley, 2008 (cb: 621.382:004 C559f)
- [4] Wakerly J, Digital design: principles and practices, (link*), Prentice Hall, 2006 (cb: 621.382 W149d 4.ed.)
- [5] Wakerly J, Digital design: principles and practices, 3 ed, Prentice Hall, 2000
- [6] Hwang E, Digital logic and microprocessor design with VHDL (link*), Thomson, 2006 (cb: 621.382:004 H991d)
- [7] Damore R, VHDL - Descrição e síntese de circuitos digitais (link*), LTC, 2005 (cb: 004.312.44 D164v)
- [8] Pedroni V, Eletrônica digital moderna e VHDL, Elsevier, 2010 (cb: 621.382:004 P372e)
- [9] Ordonez E et al, Microcontroladores e FPGAs: aplicações em automação, Novatec, 2006 (cb: 621.3.049.77 M843m)
- [10] Ashenden P, VHDL tutorial, Elsevier (link*)
*: link to online available resources
cb: identifier on the university library (link)
First part
First part
- Introduction
- Introduction to digital systems
- Shift registers
- Introduction to memory an data storage
- Introduction to microcomputers
- Analog-to-digital conversion and Introduction to processing of digital signals
First term: October 2nd
Second part
Second part
- Programmable logic
- PLD and complex PLD
- Field programmable gate arrays (FPGA)
- FPGAs of Altera
- Introduction to Quartus
- FPGAs of Xilinx
- Introduction to ISE
- Introduction to hardware description languages (HDL)
Second term: November 13rd
Third part
Third part
- Describing logic circuits
- VHDL and gate-level combination circuit
- RT-level combinational circuit
- Regular sequential circuit
- Combinational logic circuits
- Flip-flops and related circuits
- Digital arithmetic: operations and functions
- Introduction to FSM and FSMD
Third term: December 6th
Final exam: December 13rd
Activities
Activities
Reading in home
Reading in home
Topics related with VHDL of Sections 3.16-3.20 of Chapter 3 of [1] (pages 83-92)Topics related with VHDL of Sections 4.14-4.17 of [1] (pages 143-162)Topics related with VHDL of Sections 5.25 5.26 5.27 (pages 225-238)Topics related with VHDL of Section 6.20 (pages 293-294)Topics related with VHDL of Section 7.12 (pages 349-354)Topics related with VHDL of Section 9.18 (pages 563-566)
Readings above will be evaluated in the first term
Sections 10.1-10.8 (pages 552-601) of Chapter 10 of [2]Introduction and Sections 12.1-12.20 (pages 683-734) of Chapter 12 of [1]Sections 11.1-11.8 (pages 621-670) of Chapter 11 of [2]Introduction and Sections 13.1-13.6 (pages 750-769) of Chapter 13 of [1]
Readings above will be evaluated in the second term
Sections 11.1-11.8 of [2]Introduction and Sections 13.1-13.3 of Chapter 13 of [1]
Readings above will be evaluated in the third term
Problems
Problems
Problems 3.43-3.46 of [1]Problems 4.50, 4.52, 4.54, 4.56, 4.57, 4.58, 4.61, 4.62, 4.63, 4.65 and 4.66 of [1] (pages 170-172)Problems 5.60, 5.61, 5. 62, 5.63a, 5.64, 5.65, 5.66b and 569b of [1] (page 249)Problems 6.49 and 6.50 of [1] (page 303)Problems 7.52 and 7.53b of [1] (417-418)
Problems above will be evaluated in the first term
Problems 1-24 of Chapter 10 of [2] (pages 613-617)
Problems above will be evaluated in the second term
Problems 1-26 of Chapter 11 of [2]Problems 13.1-13.8 of Chapter 13 of [1]
Problems above will be evaluated in the third term
Lab
Lab
Scripts
Scripts
- Digital clock (pdf)
- Shift registers (pdf)
- Memory and storage (pdf)
- Programmable logic devices (i)
- Programmable logic devices (ii)
- ALU (pdf)
- Gate level combinational circuits (pdf)
Quartus
Quartus
Manual (link) and instructions for downloading (link)
ISE
ISE
Manual (link) and Manual Nexys2 (link)
Video-clips showing how to implement, simulate and download projects using ISE and Nexys2 kit
Video-clips showing how to import projects using ISE and Nexys2 kit
Relevant readings
Relevant readings
Peligrini C, Claude Elwood Shannon e A Symbolic of Relay and Switching Circuits: tornando um computador uma máquina semiótica, Revista de comunicação e cultura, v7, n1, 2006 (pdf)
Additional information (in Portuguese)
Additional information (in Portuguese)
- Calendário acadêmico 2018 da universidade (pdf)
- Dispositivos lógicos programáveis (link)
- Dispositivos lógicos programáveis (link)
- Introdução a VHDL (apostila, slides)
- VHDL SD2 (link)
- Nexys 2 manual (link)
- Engenharia de controle e automação (link, link)
- DSP and VHDL (link) - code availble
- FPGA and DSP Laboratory (link) - code availble
- Course on FPGA Design and VHDL (link) - slides available
- Intel FPGA solutions (link)
- Xilinx development zone (link)
Additional resources
Additional resources
Google Sites
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