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General Information
General Information
- Language of lectures: Portuguese
- Name in Portuguese : Eletrônica digital
- Requisites: Electronic circuits I (Eletrônica básica i) and Introduction to computing engineering (Introdução à engenharia de computação)
- Credits: 4
- Hours per semester (h): 75
- Lecture (h): 60
- Laboratory (h): 15
Schedule at glance
Schedule at glance
- Introduction
- Number systems and Boolean algebra
- Combinational and sequential logic circuits
- Digital arithmetic, counters and registers
- Circuit logic families
- Introduction to VHDL and PLD
Bibliography
Bibliography
- [1] Tocci R, Sistemas digitais, princípios e aplicações, 11 ed. Prentice Hall, 2011 (cn: 621.382:004 T631s 11.ed.)
- [2] Floyd T, Sistemas digitais: fundamentos e aplicações, 9 ed. Bookman, 2007 (cn: 621.32 F645s 9.ed.)
- [3] Wakerly J, Digital design: principles and practices, 2 ed, (link*), Prentice Hall, 2006 (cn: 621.382 W149d 4.ed.)
- [4] Pedroni V, Eletrônica digital moderna e VHDL, Elsevier, 2010 (cn: 621.382:004 P372e)
cn: call number in the library of the university (link)
Software
Software
Electronic Work Bench (link, introduction)
Semester 2017-2
Semester 2017-2
Tuesday: 13:00 (3h) at room 12 of Ax. 3
Friday: 07:00 (2h) at room 08 of Ax. 3 / Electronics Lab
Schedule in detail (link)
First part
First part
- Introduction
- Number systems and codes
- Boolean algebra and Boolean theorems
- Symbol of logic gates
- Propagation delay
- Combinacional logic circuits
- Simplifying logic circuits and Karnaugh map
- exclusive-OR and exclusive-NOR
- Basic features of digital CIs
First term: Oct. 17th
Second part
Second part
- Sequential circuits
- Latchs, Flip-flops and clock signal
- Flip-flops, types and applications
- Schmitt trigger devices
- Digital arithmetic circuits
- Binary addition, subtraction, multiplication and division
- BCD addition and hexadecimal arithmetic
- Complete adder and ALU
- Asynchronous and synchronous counters, and registers
- State machine
Second term: Nov. 28th
Third part
Third part
- Integrate-circuits logic families
- TTL logic family
- MOS technology
- MSI logic circuits, decoders, encoders, multiplexer, demultiplexer, magnitude comparator, code converter, data busing
- Introduction to VHDL
- Introduction to PLD
Third term: Dec. 22nd
Final exam: Jan. 5th
Activities
Activities
Reading
Reading
- Chapter 1 of [1]: Introduction and Sections 1.1-1.9 (pages 1-20)
- Chapter 2 of [1]: Introduction and Sections 2.1-2.10 (pages 24-42)
- Chapter 3 of [1]: Introduction and Sections 3.1-3.10 (pages 49-70)
- Chapter 4 of [1]: Introduction and Sections 4.1-4.8 (pages 100-129)
- Chapter 4 of [1]: Section 4.9 (pages 129-135)
- Chapter 5 of [1]: Introduction and Sections 5.1 , 5.3 (pages 174-183) and 5.4-5.20 (pages 184-215)
- Chapter6 of [1]: Introduction and Sections 6.1-6.16 (pages 252-283)
- Chapter 7 of [1]: Introduction and Sections 7.1-7.10 (pages 305-345)
- Chapter 7 of [1]: Introduction and Sections 7.15-7.17 (pages 377-389)
- Chapter 9 of [1]: Introductions and Sections 9.1-9.4, 9.6-9.8, 9.10-9.11
- Chapter 8 of [1]: Introduction, Section 8.1, 8.7, 8.8, and 8.12
Problems
Problems
- Chapter 2 of [1]: All problems marked with asterisk and all challenging exercises (2.37-2.41)
- Chapter 3 of [1]: All problems marked with asterisk but 3.43 and 3.45
- Chapter 4 of [1]: All problems marked with asterisk but 4.50-4.66
- Chapter 5 of [1]: 5.1-5.5 and 5.7-5.22
- Chapter 6 of [1]: All problems marked with asterisk of Sections 6.1-6.16
- Chapter 7 of [1]: All problems marked with asterisk of Sections 7.1-7.10, 7.15-7.17
- Chapter 9 of [1]: 9.1-9.5, 9.8-9.10, 9.12-9.16, 9.27-9.45, 9.53, 9.55
- Chapter 8 of [1]: 8.18, 8.19
Additional activities
Additional activities
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