Ph.D Students

Julia Nako

Julia Nako received the B. Sc. in Physics and the M. Sc. degree in Electronics from the University of Patras, Greece, in 2021 and 2023 respectively. She is currently PhD candidate working with the Analog Integrated Circuits Design research group. Her main research interests are focused on the area of the design of analog integrated circuits and systems for signal processing, including non-integer order circuits, control systems, and biomedical circuits.

The subject of her PhD Thesis is: “Design of Analog Integrated Circuits/Systems for Signal Processing in Interdisciplinary Applications”

• e-mail: julia.nako@ac.upatras.gr

• Profile in Research Gate

• Profile in Google Scholar

Awards:

• J. Nako and C. Psychalinos, “Formant Filters Designs with Adjustable Characteristics”, PAnhellenic Conference on Electronics and Telecommunications (PACET), March 28-29,Thessaloniki, Greece, 2024.

Awarded as Best  Student Paper in 2024 Panhellenic Conference on Electronics & Telecommunications (PACET), March 28-29, Thessaloniki, Greece

• J. Nako, G. Tsirimokou, and C. Psychalinos, “Generalized Non-Integer Order Controllers Implementations”, IEEE 46th International Conference on Telecommunications and Signal Processing (TSP), Prague, Czech Republic, 2023, pp. 134-138, doi: 10.1109/TSP59544.2023.10197819

Awarded as Best Student Paper in IEEE 46th International Conference on Telecommunications and Signal Processing (TSP), Prague, Czech Republic, 2023.

• J. Nako and C. Psychalinos, "Heart Rate Controller Design for Cardiac Pacemaker," 2022 Panhellenic Conference on Electronics & Telecommunications (PACET), 2022, pp. 1-4, doi: 10.1109/PACET56979.2022.9976347

Awarded as Best Student Paper in 2022 Panhellenic Conference on Electronics & Telecommunications (PACET), Dec. 02-04, Tripolis, Greece

• Journal Publications:

1. J. Nako, C. Psychalinos, A. S. Elwakil, "Minimum Active Component Count Design of a PIλDμ Controller and Its Application in a Cardiac Pacemaker System", Journal of Low Power Electronics and Applications. 2023. 13(1):13. doi:10.3390/jlpea13010013

2. J. Nako, C. Psychalinos, and A. S. Elwakil,"A 1 + α Order Generalized Butterworth Filter Structure and Its Field Programmable Analog Array Implementation",  Electronics, vol. 12, no. 5: 1225, 2023, doi:10.3390/electronics12051225

3. J. Nako, C. Psychalinos, A. S. Elwakil and D. Jurisic, "Design of Higher-Order Fractional Filters With Fully Controllable Frequency Characteristics," IEEE Access, vol. 11, pp. 43205-43215, 2023, doi: 10.1109/ACCESS.2023.3271863.

4. J. Nako, C. Psychalinos, and A. S. Elwakil, “One active element implementation of fractional-order Butterworth and Chebyshev filters”, International Journal of Electronics and Communications (AEU), vol. 168, 154724, 2023 doi:10.1016/j.aeue.2023.154724.

5. J. Nako, C. Psychalinos, and A. S. Elwakil, “Complex-order controller design examples and their implementation”, International Journal of Circuit Theory and Applications, pp. 1‐10, 2023, https://doi.org/10.1002/cta.3751.

6. J. Nako, C. Psychalinos, A. S. Elwakil, and S. Minaei, “Non-Integer Order Generalized Filters Designs”, IEEE Access,  vol. 11, pp. 116846-116859, 2023, doi:10.1109/ACCESS.2023.3325911.  

7. J. Nako, C. Psychalinos, and S. Minaei, “Single-Input Multiple-Output Inverse Filters Designs with Cascade Capability”,  AEU - International Journal of Electronics and Communications, vol. 175, 155061, 2024, https://doi.org/10.1016/j.aeue.2023.155061.

8. J. Nako, C. Psychalinos, and S. Minaei, “First-order universal shadow filter designs with scaled time constants”,International Journal of Circuit Theory and Applications, 2024, https://doi.org/10.1002/cta.3884.

9. J. Nako, C. Psychalinos, A. S. Elwakil, and B. J. Maundy, "Power-Law Negative Group Delay Filters", Electronics, vol. 13, no. 3, 522, 2024, https://doi.org/10.3390/electronics13030522.

10. J. Nako, C. Psychalinos, F. Khateb and A. S. Elwakil, "Bilinear Double-Order Filter Designs and Application Examples," IEEE Access, vol. 12, pp. 14040-14049, 2024, https://doi.org/10.1109/ACCESS.2024.3357092.

11. J. Nako, C. Psychalinos, B. J. Maundy, and A. S. Elwakil, “Elementary Negative Group Delay Filter Functions”, Circuits Systems and Signal Processing, 2024. https://doi.org/10.1007/s00034-024-02647-9.

12. J. Nako, G. Tsirimokou, C. Psychalinos, and S. Minaei, “Multi-phase sinusoidal oscillator design based on first-order shadow filters”, AEU - International Journal of Electronics and Communications, 155263, 2024. https://doi.org/10.1016/j.aeue.2024.155263.

13. J. Nako, C. Psychalinos, A.S. Elwakil, and B. J.Maundy, “A note on the bandwidth of negative group delay filters”, International Journal of circuit Theory and Applications, p.1-8. 2024. https://doi.org/10.1002/cta.4132

14. J. Nako, G. Tsirimokou, and C. Psychalinos, “Adjustable resonator and anti-resonator designs for speech signal processing”, AEU - International Journal of Electronics and Communications, vol. 183, 155382, 2024. https://doi.org/10.1016/j.aeue.2024.155382.

• Conferences Proceedings Publications:

1. J. Nako, S. Kapoulea, C. Psychalinos, J. Baranowski, W. Bauer, P. Piatek, A. Tutaj, "Reduced Spread Fractional-Order PID Controller Designs," IEEE 44th International Conference on Telecommunications and Signal Processing (TSP), Brno, Czech Republic, 2021, pp. 187-190, doi: 10.1109/TSP52935.2021.9522679.

2. J. Nako and C. Psychalinos, "Heart Rate Controller Design for Cardiac Pacemaker,"2022 Panhellenic Conference on Electronics & Telecommunications (PACET), 2022, pp. 1-4, doi: 10.1109/PACET56979.2022.9976347

3. J. Nako, C. Psychalinos, and A. S. Elwakil, "Modified Pre-Processing Stage for Improving the Noise Immunity of the Pan-Tompkins Algorithm", IEEE 12th International Conference on Circuits and Systems Technologies (MOCAST 2023), June 28-June 30, 2023, pp.1-4, doi: 10.1109/MOCAST57943.2023.10176650.

4. J. Nako, G. Tsirimokou, and C. Psychalinos, “Generalized Non-Integer Order Controllers Implementations”, IEEE 46th International Conference on Telecommunications and Signal Processing (TSP), Brno, Czech Republic, 2023, pp. 134-138, doi: 10.1109/TSP59544.2023.10197819.

5.  J. Nako, C. Psychalinos, and A. S. Elwakil, “Compact Structure for Implementing Elementary Fractional-Order Filter Functions”, IEEE 46th International Conference on Telecommunications and Signal Processing (TSP), Brno, Czech Republic, July 12-14, 2023, pp. 78-81, doi: 10.1109/TSP59544.2023.10197785.

6. J. Nako, S. Kapoulea, P. Bertsias, G. Tsirimokou, and C. Psychalinos, “Interdisciplinary Applications of Non-Integer Order Circuits & Systems”, 18th IEEE International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2023), Sept. 2023, Xanthi, Greece.

7. J. Nako, G. Tsirimokou, and C. Psychalinos,  “Simple Designs of Power-Law Basic and Inverse Filters”, in IEEE 5th Conference in Novel Intelligent and Leading Emerging Sciences (NILES 2023), Oct. 21-23,Giza, Egypt, 2023,  pp. 175-178, doi: 10.1109/NILES59815.2023.10296652.

8.  J. Nako, and C. Psychalinos, “Formant Filters Designs with Adjustable Characteristics”, 2024 Panhellenic Conference on Electronics & Telecommunications (PACET), Thessaloniki, Greece, 2024, pp. 1-4, doi:10.1109/PACET60398.2024.10510194.

9. J. Nako, E. Kaloudi, G. Tsirimokou, and C. Psychalinos, “An Electronically Tunable Universal Non-Integer-Order Filter Structure”, 2024 Panhellenic Conference on Electronics & Telecommunications (PACET), Thessaloniki, Greece, 2024, pp. 1-4, doi:10.1109/PACET60398.2024.10497036.

10. J. Nako, G. Tsirimokou, and C. Psychalinos, “Minimum Active Component Count Formant and Inverse Formant Filters Designs”, IEEE  47th International Conference on Telecommunications and Signal Processing (TSP), Brno, Czech Republic, July 10-12, pp. 183-186, 2024.

11. J. Nako, G. Tsirimokou, and C. Psychalinos, “ Reducing the Spread of Passive Elements Values in Power-Law Transfer Functions”, IEEE  47th International Conference on Telecommunications and Signal Processing (TSP), Brno, Czech Republic, July 10-12, pp. 6-9, 2024.