I am currently a staff member in AMD working as performance engineer for machine learning (ML) on GPUs. Prior to AMD, I was a compiler engineer at SambaNova Systems building custom ML compiler stack for the underlying reconfigurable dataflow-based ML accelerator (RDU). I earned my Ph.D. in CSE from the University of Michigan Ann Arbor in 2022. My dissertation, Building User-Driven Edge Device, proposed hardware-software co-design based solutions to enhance the performance and energy efficiency of emerging ML applications for the edge and IoT devices. My research proposed hardware-friendly techniques that tailored edge applications to individual users based on their unique characteristics and preferences on their local edge devices. The reduced application footprint and computational intensity significantly enhance the overall applications' efficiency.