Research & Projects

I am currently working with Professor Valeria Bertacco on a project to reduce the impact of obsolete silicon with chiplets. Currently, many systems in the defense and automotive industry rely on chips that are aging and obsolete. There are a few solutions available when an obsolete device fails, but this project aims to improve the economic prospects of custom-designing a Form-Fit-Function (F3) replacement for the obsolete chip. 

Project Started: Sept. 2023

There are many emerging non-volatile memory devices being explored for their capabilities in processing-in-memory. This project was in support of designing custom FPGA fabric for an array processor that made use of memristors, one of the aforementioned non-volatile memory devices. There are several academic tools for customizing FPGA fabric, but when using components outside of traditional logic devices (as memristors are), it is difficult to debug your design early in the process. This project extended Verilog using the Verilog Procedural Interface (VPI) to enable early debugging of memristors by implementing their behavior in C and loosely coupling that functionality with the Verilog RTL through calls to the VPI. This work was conducted at University of Arkansas with Dr. Alex Nelson and the support of an Honors College Undergraduate Research Grant. 

Thesis: https://scholarworks.uark.edu/cgi/viewcontent.cgi?article=1112&context=csceuht 

This project investigated the effects of various masking and hiding techniques on a microcontroller's power usage. Standard methods were used to quantify the secureness of each implementation that used some combination of hiding and masking techniques. Power traces were then collected to measure the power usage of each technique as well as the Energy-Delay Product (EDP) in order to quantify the secureness-power tradeoff in the design space.  This project was done at University of Arkansas.