- Presented my ACM TACO paper at HiPEAC 2020, in Bologna Italy.
- Our paper: "Generalized Data Placement Strategies for Racetrack Memories " got accepted for publication in DATE 2020.
- Excited to announce that my application for HiPEAC collaboration grant got accepted. I will be moving to ETH Zurich from mid October 2019 till mid January 2020 and will be working with Tobias Grosser to develop compilers for Racetrack Memories.
- Attended ACACES-2019, 14-20 July 2019, Fiugigi Italy.
- Our paper "SHRIMP: Efficient Instruction Delivery with Domain Wall Memory" got accepted for publication in ISLPED 2019.
- Presented our paper "Optimizing Tensor Contractions for Embedded Devices with Racetrack Memory Scratch-Pads", at LCTES 2019 Phoenix, AZ.
- Our Racetrack simulator (RTSim) paper got accepted in Computer Architecture Letters (CAL), January, 2019.
- Attended HiPEAC summer school ACACES-2018, 8-14 July 2018, Fiuggi, Italy.
- Presented my paper, “NVMain Extension for Multi-Level Cache Systems”, at RAPIDO’18.