Abstract
With the pervasive digitalization of many functions and the growth of interconnected infrastructures, critical applications increasingly rely on dependable electronics, especially integrated systems. Dependability has evolved from reliability and availability to include safety and, more recently, growing hardware security demands in sectors such as automotive, industrial control, aerospace, health, and defense. While security is often viewed as a natural extension of reliability and safety, conflicts can arise during system design. VLSI design flows, typically focused on area/performance/energy trade-offs, address reliability mainly at the process level. However, more complex trade-offs emerge when safety and security are both essential. This tutorial explores threats to reliability, safety, and hardware security, analyzing their overlaps, complementarities, and key differences. It highlights synergies and limitations in VLSI design, using practical examples to show that overoptimism can undermine trustworthiness. Addressing hardware security introduces significant challenges and requirements across the design flow, even when functional safety is considered. A literature review will outline the current challenges and reveal research opportunities toward more holistic design practices.
Biography - Prof. Régis Leveugle, Ph.D., IEEE Senior Member
Régis Leveugle (IEEE M’91–SM'14) received the Ph.D. degree in Microelectronics from the National Polytechnical Institute of Grenoble (INPG), France, in 1990 after the M. Eng. Degree in Electronics and the M.S. Degree in Microelectronics in 1987. He is currently a Professor at Grenoble INP – UGA Graduate schools of Engineering and Management, Grenoble, France and a member of TIMA laboratory. His main interests are computer architecture, integrated system design methods and tools, dependability analysis and digital system design for reliability, safety and security. He has authored or co‐authored more than 250 scientific papers and served as a program committee member or reviewer for numerous journals and conferences. He received three awards from IEEE Computer Society in 2003, 2013 and 2024 and a Research Award from CISCO and the Silicon Valley Community Foundation in May 2009.