FAPI Interface

5G-NR offers a full range of mobile broadband services, including massive connectivity from human-held intelligent devices to sensors and machines. More importantly, it can support critical machine-based communications with instant action and ultra-high reliability. Several physical and virtual network interfaces, such as Femto Application Programming Interface (FAPI), Open Radio Access Network (ORAN), and Peripheral Component Interfacing Express (PCIe), play a prominent role in achieving high throughput for 5G base stations. In our work, we concentrate primarily on the architectural implementation of one such prime interface, the FAPI. 

FAPI is an interface that helps the MAC layer of the Layer 2 protocol stack communicate with the Physical (PHY) Layer in 5G implementations. In contrast to the FAPI in 4G LTE, FAPI in 5G NR offers advanced error indication messaging, reliability and secured communication for messages. It also enables structure exchange procedures between the MAC and PHY layers at higher throughput. In this work, I propose an FPGA-based implementation methodology for FAPI that manages the physical layer and allows synchronised data flow between MAC and PHY. This FPGA-based implementation is currebtly being used on the campus trails at the Indigenous 5G testbed lab, IIT Madras.