1.5 Ports

There are five IC chips used as input/output ports on the board.

Output ports are decoded by 74HC138, input ports by two chips 74HC1G32.

Extension boards can use

for output ports: bits D0-D4 for addressing/enable (D5, D6 for decoding), D7 must be log. 1

for input ports: bits D0-D5, D6 and D7 must be log. 1

general output port

full 8-bit port

; example

LD A, ANY_VALUE

OUT (1Fh), A

general input port

full 8-bit port

IN A, (7Fh)

internal output port

8 independent pins

A13-A15- pin selector (x)

D0-bit state (y)

LD A, xxx0000y

OUT (5Fh), A

LD A, 0000000y

LD B, xxx00000

LD C, 5Fh

OUT (C), A

internal/external output port

8 independent pins

A13-A15- pin selector (x)

D0-bit state (y)

LD A, xxx0000y

OUT (7Fh), A

LD A, 0000000y

LD B, xxx00000

LD C, 7Fh

OUT (C), A

internal/external input port

8 independent pins

A13-A15- pin selector

D0-bit state

LD A, xxx00000

IN A, (BFh)

LD B, xxx00000

LD C, BFh

IN A, (C)

memory page mapping port

A15, A14-memory segment selector (s)

A10-A13-memory page selector (p)

LD A, sspppp00

OUT (3Fh), A

From Z-80 datasheet:

OUT (n), A

The operand n is placed on the bottom half (A0 through A7) of the address

bus to select the I/O device at one of256 possible ports. The contents of the

Accumulator (register A) also appear on the top half (A8 through A15) of

the address bus at this time. Then the byte contained in the Accumulator is

placed on the data bus and written to the selected peripheral device

OUT (C), r

The contents of register C are placed on the bottom half (A0 through A7) of

the address bus to select the I/O device at one of 256 possible ports. The

contents of Register B are placed on the top half (A8 through A15) of the

address bus at this time. Then the byte contained in register r is placed on

the data bus and written to the selected peripheral device.