Principal Software Engineer with 10+ years architecting internet-scale platforms driving measurable business transformation across Director, VP, and organizational levels. Proven track record of leading cross-functional initiatives affecting 200-2000+ engineers, securing CTO/SVP alignment for strategic platform initiatives, and delivering industry-first solutions that prevent major business risks (potential 10% revenue penalties, $460M trading disasters, 4.5B+ unauthorized content views). Product-minded senior technical leader with deep expertise across four critical technical domains:

Ads, Search, and Recommendation Systems: Pioneered vacation rental platform processing 6M+ listings 3.3x larger than Google Hotels earning Engineering Excellence Award (Google), revolutionized ads serving infrastructure through Director/VP-level collaboration reducing development cycles by 88% across 200+ engineers (Amazon), architected comprehensive growth optimization infrastructure processing 13.1B daily notification evaluations driving +80k incremental DAU with industry-leading observability frameworks (Snap).

Policy Evaluation Engines: Built comprehensive reference-to-reference conflict resolution systems preventing 4.5B unauthorized daily views across Facebook and Instagram (Facebook), architected next-generation issuing authorization infrastructure supporting projected growth from 1% to ⅓ of Stripe's revenue enabling 400x scale (Stripe).

Privacy, Legal, and Compliance Infrastructure: Designed post-trade risk management systems with comprehensive regulatory compliance preventing Knight Capital-style trading violations (Two Sigma), implemented systematic copyright protection frameworks with crisis leadership during Disney's Mulan launch identifying 776 violations in 5 days (Facebook), led Digital Markets Act compliance execution across 2000+ engineers at Amazon Ads level preventing potential 10% revenue penalty through comprehensive governance framework (Amazon).

Low-Level Systems Programming: Architected industry-first real-time VCPU scheduling in Xen hypervisor with multiple server mechanisms (deferrable, polling, periodic, sporadic) and RTCA network architecture (WUSTL), designed ultra-low-latency trading systems achieving sub-microsecond performance through FPGA co-design (Two Sigma).

I received my Ph.D in CS from Washington University in St. Louis in 2014, and B.E. in CS from Beijing University of Posts and Telecommunications in 2008.