Publications

Ikki Nagaoka, Ryota Kashima, Koki Ishida, Masamitsu Tanaka, Taro Yamashita, Takatsugu Ono, Koji Inoue, and Akira Fujimaki, “A High-Throughput Multiply-Accumulate Unit with Long Feedback Loop Using Low-Voltage Rapid Single-Flux Quantum Circuits,” IEEE Transactions on Applied Superconductivity, Vol. 33, Issue 3, 8 pages, Apr. 2023.

Koki Ishida, Il-Kwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue, "Superconductor Computing for Neural Networks," IEEE Micro, vol.41, no.03, pp.19-26, May-June, 2021.

Ikki Nagaoka, Koki Ishida, Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita, Takatsugu Ono, Koji Inoue,  Akira Fujimaki, "Demonstration of a 52-GHz Bit-Parallel Multiplier Using Low-Voltage Rapid Single-Flux-Quantum Logic," IEEE Transactions on Applied Superconductivity, Vol.31, No.5, pp.1-5, Aug. 2021.

Teruo Tanimoto, Takatsugu Ono, Koji Inoue, ”Critical Path based Microarchitectural Bottleneck Analysis for Out-of-Order Execution,” IEICE, Vol.E102-A, No.6, pp.758-766, Jun. 2019.

Mihiro Sonoyama, Takatsugu Ono, Haruichi Kanaya, Osamu Muta, Smruti Sarangi, Koji Inoue, “Radio Propagation Characteristics-Based Spoofing Attack Prevention on Wireless Connected Devices,” Journal of Information Processing, Vol.27, pp.322-334, Feb. 2019.

Yusuke Inoue, Takatsugu Ono, Koji Inoue, “Real-time Frame-Rate Control for Energy-Efficient On-Line Object Tracking,” IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E101-A, No.12, pp.2297-2307, Dec. 2018.

Satoshi Imamura, Yuichiro Yasui, Koji Inoue, Takatsugu Ono, Hiroshi Sasaki, Katsuki Fujisawa, "Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs,” IEICE Transactions on Information and Systems, Vol.E101-D, No.9, pp.2247-2257, Sep. 2018.

Satoshi Kawakami, Takatsugu Ono, Toshiyuki Ohtsuka, Koji Inoue, "Parallel Precomputation with Input Value Prediction for Model Predictive Control Systems,” IEICE Transactions on Information and Systems, Vol.E101-D, No.12, pp.2864-2877, Dec. 2018.

Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue, "Towards Ultra High-Speed Cryogenic Single-Flux-Quantum Computing,” , IEICE Transactions on Electronics, Vol.E101-C, No.5, pp.359-369, May. 2018. (invited paper)

Teruo Tanimoto, Takatsugu Ono, Koji Inoue, "Dependence Graph Model for Accurate Critical Path Analysis on Out-of-Order Processors," Journal of Information Processing, Vol.25, pp.983-992, Dec. 2017.

Teruo Tanimoto, Takatsugu Ono, Koji Inoue, Hiroshi Sasaki, "Enhanced Dependence Graph Model for Critical Path Analysis on Modern Out-of-Order Processors,” IEEE Computer Architecture Letters, Vol.16, No. 2, pp.111-114, July-Dec. 2017.

Takatsugu Ono, Yotaro Konishi, Teruo Tanimoto, Noboru Iwamatsu, Takashi Miyoshi, Jun Tanaka,  “A Flexible Direct Attached Storage for a Data Intensive Application,” IEICE Transactions on Information and Systems, Vol. E98-D No.12, pp.2168-2177, Dec. 2015.

Yotaro Konishi, Takatsugu Ono, Takashi Miyoshi, "Fast Data Recovery for Object Storage Systems Using Disk Area Network (in Japanese)," IPSJ Vol.6, No.4, pp.38-48, Oct. 2013

Takatsugu Ono, Koji Inoue, Kazuaki Murakami "Reusing Simulation Results for Cache Miss Rate Prediction (in Japanese)," IPSJ Transactions on Advanced Computing Systems, Vol.52, No.12, pp.3172-3183, Dec. 2011

Takatsugu Ono, Koji Inoue, Kazuaki Murakami and Kenji Yoshida “Reducing On-Chip DRAM Energy via Data Transfer Size Optimization,” IEICE Transactions on Electronics, Vol. E92-C, No.4, pp.433-443, Apr. 2009.

Takatsugu Ono, Koji Inoue and Kazuaki Murakami “Fast, Accurate Memory Architecture Simulation Technique Using Memory Access Characteristics (in Japanese),” IPSJ Transactions on Advanced Computing Systems, Vol.48, No. SIG13 (ACS19), pp.203-213, 2007

Takumi Inaba, Takatsugu Ono, Koji Inoue, and Satoshi Kawakami, “A Hybrid Opto-Electrical Floating-point Multiplier,” The 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), pp.313-320, Dec. 2022.

Satoshi Matsushita, Teruo Tanimoto, Satoshi Kawakami, Takatsugu Ono, and Koji Inoue, “An Edge Autonomous Lamp Control with Camera Feedback,” IEEE 8th World Forum on Internet of Things, Oct. 2022.

Iori Ishikawa, Ikki Nagaoka, Ryota Kashima, Koki Ishida, Kosuke Fukumitsu, Keitaro Oka, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Akira Fujimaki, and Koji Inoue, “Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device,” International Symposium on Circuits & Systems (ISCAS), pp.1-5, May 2022.

Koki Ishida, Il-Kwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue, “Architecting an Extremely Fast Neural Processing Unit Using Superconducting Logic Devices,” The 53rd IEEE/ACM International Symposium on Microarchitecture, pp. 58-72, Oct. 2020.

Koki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, Koji Inoue, “32 GHz 6.5 mW Gate-Level-Pipelined 4-bit Processor using Superconductor Single-Flux-Quantum Logic,” 2020 Symposia on VLSI Technology and Circuits, Jun. 2020. 

Keitaro Oka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Koji Inoue, “Enhancing a Manycore-Oriented Compressed Cache for GPGPU,” International Conference on High Performance Computing in Asia-Pacific Region, pp.22–31, Jan. 2020.

Giorgis Georgakoudis, Nikhil Jain, Takatsugu Ono, Koji Inoue, Shinobu Miwa, Abhinav Bhatele, “Evaluating the Impact of Energy Efficient Networks on HPC Workloads,” 26th IEEE International Conference on High Performance Computing, Data, and Analytics, Dec. 2019.

Sandeep Kumar, Diksha Moolchandani, Takatsugu Ono and Smruti Sarangi, "F-LaaS: A Control-Flow-Attack Immune License-as-a-Service Model,” IEEE International Conference on Services Computing, pp.80-89, Jul. 2019.

Takatsugu Ono, Zhe Chen and Koji Inoue, "Improving Lifetime in MLC Phase Change Memory using Slow Writes," International Japan-Africa Conference on Electronics, Communication and Computations, pp.65-pp.68, Dec. 2018.

Yusuke Inoue, Takatsugu Ono and Koji Inoue, "Situation-Based Dynamic Frame-Rate Control for On-Line Object Tracking," International Japan-Africa Conference on Electronics, Communication and Computations, pp.129-pp.132, Dec. 2018.

Ghadeer Almusaddar, Teruo Tanimoto, Takatsugu Ono, Smruti Sarangi, Koji Inoue, “Whitelisting Approach Using Hardware Performance Counters in IoT Microprocessors," 4th Career Workshop for Women and Minorities in Computer Architecture, Oct. 2018.

Masamitsu Tanaka, Yuki Hatanaka, Yuichi Matsui, Ikki Nagaoka, Koki Ishida, Kyosuke Sano, Taro Yamashita, Takatsugu Ono, Koji Inoue, Akira Fujimaki, “30-GHz Operation of Datapath for Bit-Parallel, Gate-Level-Pipelined Rapid Single-Flux-Quantum Microprocessors," Applied Superconductivity Conference, Oct. 2018. (invited)

Teruo Tanimoto, Takatsugu Ono, Koji Inoue, "CPCI Stack: Metric for Accurate Bottleneck Analysis on OoO Microprocessors,” In Proc. of the International Symposium on Computing and Networking, pp.166-172, Nov. 2017.

Mihiro Sonoyama, Takatsugu Ono, Osamu Muta, Haruichi Kanaya, Koji Inoue, "Wireless Spoofing-Attack Prevention Using Radio-Propagation Characteristics," In Proc. of the 15th IEEE International Conference on Dependable, Autonomic and Secure Computing, pp.502-510, Nov. 2017.

Takatsugu Ono, "Developing an Interconnection Network Simulator for Energy Efficient Large Scale Networks,” Workshop on Recent Topics in High Performance Computing, Sep. 2017.

Masamitsu Tanaka, Ryo Sato, Yuki Hatanaka, Yuichi Matsui, Hiroyuki Akaike, Akira Fujimaki, Koki Ishida, Takatsugu Ono, Koji Inoue, "1.4-mW, 56-GHz Arithmetic Logic Unit Based on Superconductor Single-Flux-Quantum Logic Circuit," IEEE/ACM International Symposium on Low Power Electronics and Design, International Low Power Design Contest, Jul. 2017.

Masamitsu Tanaka, Ryo Sato, Yuki Hatanaka, Yuichi Matsui, Hiroyuki Akaike, Akira Fujimaki, Koki Ishida, Takatsugu Ono, Koji Inoue, “High-Throughput Bit-Parallel Arithmetic Logic Unit Using Rapid Single-Flux-Quantum Logic,” In Proc. of the International Superconductive Electronics Conference, Jun. 2017.

Satoshi Imamura, Keitaro Oka, Yuichiro Yasui, Yuichi Inadomi, Katsuki Fujisawa, Toshio Endo, Koji Ueno, Keiichiro Fukazawa, Nozomi Hata, Yuta Kakibuka, Koji Inoue, Takatsugu Ono, “Evaluating the Impacts of Code-Level Performance Tunings on Power Efficiency,” In Proc. of the IEEE International Conference on Big Data (Big Data), pp.362-369, Dec. 2016.

Satoshi Imamura, Yuichiro Yasui, Koji Inoue, Takatsugu Ono, Hiroshi Sasaki, Katsuki Fujisawa, "Power-Efficient Breadth-First Search with DRAM Row Buffer Locality-Aware Address Mapping,”  In Proc. of the 1st High Performance Graph Data Management and Processing workshop (HPGDMP), pp.17-pp.24, Nov. 2016.

Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue, "Single-Flux-Quantum Cache Memory Architecture,” In Proc. of the 13th International SoC Design Conference, pp.106-107, Oct. 2016.

Yusuke Inoue, Takatsugu Ono, Koji Inoue "Adaptive Frame-Rate Optimization for Energy-Efficient Object Tracking,” In Proc. of the 20th International Conference on Image Processing, Computer Vision & Pattern Recognition, pp. 158-164, July 2016.

Yoshihiro Tanaka, Keitaro Oka, Takatsugu Ono, Koji Inoue, “Accuracy Analysis of Machine Learning-Based Performance Modeling for Microprocessors,” In Proc. of the 2016 Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC), pp.87-90, May 2016.

Takatsugu Ono, Yotaro Konishi, Teruo Tanimoto, Noboru Iwamatsu, Takashi Miyoshi, Jun Tanaka, “FlexDAS: A Flexible Direct Attached Storage for I/O Intensive Applications,“ In Proc. of the 2014 IEEE International Conference on Big Data (Big Data), pp.147-152, Oct. 2014

Yotaro Konishi, Takatsugu Ono, Takashi Miyoshi, "Fast Data Recovery for Object Storage Systems Using Disk Area Network (in Japanese)," In Proc. of the 2013 Symposium on Advanced Computing Systems and Infrastructures (SACSIS), pp.206-213, May 2013.

Takatsugu Ono, Koji Inoue, Kazuaki Murakami “Adaptive Cache-Line Size Management on 3D Integrated Microprocessors,” International SoC Design Conference, pp.472-475, Nov. 2009.

Takatsugu Ono, Koji Inoue and Kazuaki Murakami “Fast Memory Design Space Exploration Reusing Past Simulation Results,” In Proc. of the Work in Progress Session held in connection with the 11th EUROMICRO Conference on Digital System Design, Sep. 2008.

Takatsugu Ono, Koji Inoue and Kazuaki Murakami “Fast, Accurate Memory Architecture Simulation Technique Using Memory Access Characteristics (in Japanese),” In Proc. of the 2007 Symposium on Advanced Computing Systems and Infrastructures (SACSIS) pp.19-26, May 2007.

Takumi Inaba, Takatsugu Ono, Koji Inoue, and Satoshi Kawakami, “Evaluating floating-point multipliers with opto-electrical hybrid circuits,” ACM International Conference on Computing Frontiers, Poster, May 2023.

Yuta Kakibuka, Yuichiro Yasui, Takatsugu Ono, Katsuki Fujisawa, Koji Inoue, “Performance evaluation of Graph500 considering CPU-DRAM power shifting,” Poster session The International Conference for High Performance Computing, Networking, Storage, and Analysis, Nov. 2017.

Yusuke Inoue, Takatsugu Ono, Koji Inoue, “Adaptive Frame-Rate Optimization for Low Energy Object Tracking,” Work-in-Progress session at the 2016 Design Automation Conference (DAC), June 2016.

Keitaro Oka, Yuichi Inadomi, Takatsugu Ono, Koji Inoue, “Comprehensive Comparison of Power-Performance Efficiency on Accelerators,” Poster session at the 2nd Annual Meeting on Advanced Computing System and Infrastructure (ACSI), Jan. 2016.

Teruo Tanimoto, Takatsugu Ono, Kohta Nakashima, Takashi Miyoshi, “Hardware-Assisted Scalable Flow Control of Shared Receive Queue,” Poster session at the 28th International Conference on Supercomputing, June 2014. 

Shinya Hashiguchi, Takatsugu Ono, Koji Inoue, Kazuaki Murakami "SRAM/DRAM Hybrid Cache Architecture and Its Adaptive Optimization for 3D Integrated Microprocessors," Poster session at the fifteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar. 2010.

Takatsugu Ono, Koji Inoue, Kazuaki Murakami and Kenji Yoshida “A Software Controllable Variable Line Size Cache Exploiting High On-Chip Memory Bandwidth for Low Power Embedded SoCs,” In Proc. of the International Conference on Very Large Scale Integration, pp.510-513, Oct. 2008.

Takatsugu Ono, “A Network Simulator for On/Off Links of Large-Scale Interconnection Networks,” NII Shonan Meeting Seminar 134 Advances in Heterogeneous Computing from Hardware to Software, Sep. 2018.

Takatsugu Ono, Yuta Kakibuka, Nikhil Jain, Abhinav Bhatele, Shinobu Miwa, Koji Inoue, "Extending A Network Simulator for Power/Performance Prediction of Large Scale Interconnection Networks,” Modeling and Simulation of HPC Architectures and Applications held in conjunction with SIAM Conference on Parallel Processing for Scientific Computing, Mar. 2018. (to appear)

Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue, “Logic Design of a Single-Flux-Quantum Gate-Level-Pipelined Microprocessor,” Superconducting SFQ VLSI Workshop, pp.6-12, Feb. 2017.

Masamitsu Tanaka, Ryo Sato, Yuki Hatanaka, Yuki Ando, Takahiro Kawaguchi, Koki Ishida, Akira Fujimaki, Kazuyoshi Takagi, Naofumi Takagi, Takatsugu Ono, Koji Inoue, “Energy-Efficient, High-Performance Microprocessors Based on Single-Flux-Quantum Logic,” 29th International Symposium on Superconductivity, Dec. 2016.

Koji Inoue, Yuichi Inadomi, Takatsugu Ono, "Challenges in Power Constrained High Performance Computing,” 2nd Annual Meeting on Advanced Computing System and Infrastructure (ACSI), Jan. 2016.

Design Contest Award Honorable Mention, The 23rd International Symposium on Low Power Electronics and Design (ISLPED) 2017.

IPSJ Yamashita SIG Research Award (2015)

IPSJ SIGARC Young Researcher Award (2014)

IEICE CPSY Young Presentation Award (2012)