In order to obtain depth perception in computer vision, one needs to process pairs of stereo images. This process is computationally challenging to be carried out in real-time, because it requires the search for matches between objects in both images. Such process is significantly simplified if the images are rectified.
Stereo images rectification is usually achieved in two separate steps, with different computational requirements. The calculation of the transformations to be applied to each image has no real-time requirements, but is very demanding. On the other hand, applying those transformations to the video images is very restricted by real-time constraints. Therefore, these two stages are not usually implemented in the same system.
In this project, both stages are effectively implemented in a system, due to the increasing power of FPGAs.
This web-site is a complement to the project, where the different methods and algorithms are discussed. The Master Thesis report (in Portuguese) is attached.
A new method is presented, that calculates the required rectification based on a pair of stereoscopic images. An FPGA-based implementation of the method is described and evaluated, such as a module that applies the calculated changes in real time.
The system described is capable of performing real-time rectification on the images of two video cameras, with a resolution of 640 x 480 pixels and a frame rate of 25 FPS. The FPGA used for implementation is a Xilinx XC3S1500, but the system is scalable, and easily applied to images of higher resolution or a higher rate.
The results are quite satisfactory, with output images having a maximum vertical disparity of 2 pixels, proving that full images rectification can be efficiently achieved in a FPGA.