Course Learning Outcomes
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The course aims to provide students with basic informations on computer architecture and organization whether they are general purpose or dedicated (to selected scientific applications) computing systems.
Furthermore, other goal is to provide basic knowledge of software tools and dedicated languages (VHDL) required to perform modern computer hardware design.
At the end of the course the students will have a general knowledge of the computer architectures as well as they will have knowledge to manage methods of analysis and implementation of such computing systems. In addition, they will be able to understand and to explain the performance of a scientific application running on a computer (mono-processor or parallel) proposing possible and achievable optimizations.
The course will be given through face-to-face lessons and few seminars may be scheduled on specific topics held by experts in research area.
Course topics
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- Introduction to computers. Computer hardware, firmware and software, performance defining and measuring
- Language of computers: assembly language, machine languages, integer
numbers and instructions representation
- Computer arithmetic: arithmetic and logical operations on integers and
floating point numbers.
- Fundamentals of logic design and use of hardware description
languages: gates, truth tables, logic equations; clocks, memory and
Finite-State machines; introduction to VHDL
- Processor Architecture: functional units, registers, control unit,
microprogramming; processing unit; pipelining, exceptions handling
- Memory hierarchy: introduction to caches, virtual memory
- Introduction to Storage and I/O
- Overview of multicore systems, multiprocessors and clusters: parallel
processing, classification, examples of modern many-core
high-performance computing architecture(GPU) and multiprocessor systems
networks
Course Material
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- Patterson D.A., Hennessy J.L. Computer Organization and Design: The Hardware/Software Interface. Morgan Kaufmann Publishers
- Other materials (papers, tutorials, etc...)
Course Website
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https://sites.google.com/site/pierovicini/didattica/computer_arch_for_physics
Evaluation
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The final exam foreseen a small hardware project and an oral exam.
The project will include:
- Design and implementation of a specific hardware block (as seen during the course) using VHDL language and specific simulators;
- Delivery of a small paper describing the work done (20 pages max).
The oral exam will be carried out through a "plenary" talk with slides, for a maximum duration of 20 minutes and 15 minutes of Q&A
Appelli:
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28/01/2019 Prenotazione: 21/01/2019 - 27/01/2019
11/02/2019 Prenotazione: 04/02/2019 - 10/02/2019
13/05/2019 Prenotazione: 06/05/2019 - 12/05/2019
17/06/2019 Prenotazione: 10/06/2019 - 16/06/2019
15/07/2019 Prenotazione: 08/07/2019 - 14/07/2019
09/09/2019 Prenotazione: 01/09/2019 - 08/09/2019
18/11/2019 Prenotazione: 11/11/2019 - 77/01/2019
Contact:
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Course Mailing List
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comp_arch_phys_2018-19@googlegroups.com
----->> Slides and learning materials