Vassilis D. Papaefstathiou
Affiliated Researcher
Computer Architecture and VLSI Systems Lab
Institute of Computer Science, FORTH
Heraklion, Crete, Greece
papaef at ics dot forth dot gr
Vassilis (or Vasileios) Papaefstathiou is Assistant Professor in the Computer Science Department (CSD) at the University of Crete (UoC). He is also Affiliated Researcher of the Computer Architecture and VLSI Systems Laboratory at the Institute of Computer Science, FORTH.
He currently teaches the following courses:
His research interests include: Computer Architecture, High-Performance Computing, Packet Switch Architectures, High Speed Interconnects, Network Processing Architectures, Hardware Security, Storage Systems, and Embedded Systems.
Dr. Vassilis Papaefstathiou is heavily involved in the EU-funded European Processor Initiative (EPI) project and co-ordinates FORTH's technical contributions on hardware RTL design and chip bring-up and testing.
Last Update: June 2022