Vassilis D. Papaefstathiou, PhD

Computer Architecture and VLSI Systems Lab
Institute of Computer ScienceFORTH
Heraklion, Crete, Greece
papaef at ics dot forth dot gr

Vassilis (or Vasileios) Papaefstathiou holds a Ph.D. in Computer Science from the Computer Science Department (CSD) of the University of Crete (UoC). He is currently a Researcher in the Computer Architecture and VLSI Systems Laboratory at the Institute of Computer Science, FORTH. 
He teaches the following courses at Computer Science Department (CSD)University of Crete (UoC):
His research interests include: Computer Architecture, High-Performance Computing, Packet Switch Architectures, High Speed Interconnects, Network Processing Architectures, Hardware Security, Storage Systems, and Embedded Systems.

More information about my previous research activities can be found here.
Visit the Formic FPGA Prototyping Board Website:

Last Update: November 2017