3. Practical Assignment 3 - BCD Counters & Sequential Logic

Objectives:

• • To build a BCD Counter with 7-Segment Display

• To study the fundamentals of basic sequential logic concepts and circuit

  • To become familiar with various types of latches and flip-flops. 

Procedure:

The BCD Counter (0-99)

You will have to follow the experiments to build the final outcome of Exercise Experiment: Counters and 7-Segment Displays that shows you how to build a BCD counter that counts from 0-9 on a 7-segment display. This part must be completed in full before you begin the practical assignment. So, you must have completed the following blocks:

• • A 555-timer circuit block as the input (frequency of approx. 1 Hz is fine) - see Exercise Experiment: Clock Generator Circuits

  • A BCD UP/DOWN counter connected to a BCD to 7-Segment Decoder and 7-Segment Display - see Exercise Experiment: Counters and 7-Segment Displays 

1. Use the videos exercise experiments to build a counter that counts from 0-99. It is possible to build this on a single board but you have to place the chips very close to each other.

2. Modify your 0-99 counter to count in Octal.

3. Add a button to reset your counter to zero.

The next section of the practical assignment is on flip-flops. There are some videos on flip-flops in the Exercise Experiments - Flip-Flops; these should help you with the questions below.

Note: Before you disassemble your hard work (which is painful), please keep the 555 timer circuit intact so that we can use it later in this experiment.

The S-R Latch

• 1. Connect the two NOR gates as shown in Figure 1.

• • 1. Figure 1: An S-R latch created using NOR gates

• 1. Vary the inputs R and S (i.e. 0 and +5V). Attempt to obtain all the possible combinations for Q and/Q. Summarise the behaviour of the circuit in your logbook.

  2. In your opinion why is there a both a Q and /Q output from this circuit? In your opinion why does this circuit behave in the way it does?

The J-K Flip-Flop

Figure 5: The J-K flip-flop

Draw up a suitable truth table, including columns for both predicted and actual states, to record the behaviour of a J-K flip-flop. Fill in the predicted values before doing any experiments.

Using a 7473 Dual Master-Slave J-K Flip-Flop (Also attached below) IC, set up a single J-K flip-flop. Measure the actualbehaviour in each possible case, and fill in the table accordingly. Comment on whether the actual behaviour matches your predictions. Summarise the actual behaviour in words.

One of the main difficulties with this part of the laboratory is the clock input. As you are aware a flip-flop toggles when the J and K inputs are both high and when a clock pulse is applied. Setting J=K=1 is no problem, but getting a clean clock transition is. If your flip flop toggles on the rising edge of a clock signal that means that it will change state when you move your clock line from 0 to 1; however, when you make this transition your input may suffer from mechanical 'bounce' i.e. the button or wire may bounce a fraction of a millimetre in the air, which may cause a 0 to be registered for a few milliseconds. The effect of this is that your flip-flop may toggle twice (or three times or more) instead of just once, which will mean that to your eyes the output may appear to be somewhat random.

The good news is that you already have a simple solution to your problem - the 555 timer from the previous part of the experiment. It will give you a very clean clock signal that has a full period of about 1 second. If you connect the output of your 555 timer circuit to the clock input of your JK flip-flop you should get much more consistent results in this part of the experiment. The downside is that your outputs will change every second (depending on the particular inputs chosen), but this is much more representative of what a clock signal actually is in a circuit. It should help you appreciate it when you buy a 3.8GHz desktop computer, which would have a clock cycle of 0.000000000263 seconds! (2.63x10-10s)

Conclusions:

1. State briefly, but clearly, what you have learned from this assignment.

2. What was the most difficult aspect of the assignment ?

3. State one thing you enjoyed about the assignment .

4. State one thing you disliked about the assignment .

5. Add any final comment of your own.