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Overview

That's me much younger, at my desk at TokyoTech :) 

Hej! I am an associate professor in the Computer Engineering division of the Department of Computer Science and Engineering of Chalmers University of Technology. As a researcher I am interested in making future HPC fast and energy efficient. I am fascinated both by exascale applications and novel hardware approaches, my work focuses on the interface between both: compilers, runtimes and computer organizations. A more in depth description of my research is under the  Research tab.  As an educator I like to teach students about the internals of modern computers, and provide an understanding of why different software techniques make good or bad use of hardware resources. I am the lecturer and examiner for course EDA284: Parallel Computer Architecture. I am also lecturer and examiner for the course DAT400 High Performance Parallel Programming, a new course that I developed for the MPHPC master programme.

If you are a master student looking for topics, please read this (TBD)  

From July 2020 until March 2021 I am a visiting scientist at Riken R-CCS. 

Some previous positions that I held: 

Until July 2019 I was an assistant professor at Chalmers University of Technology, in the division Computer Engineering.

Until February 2016 I was a postdoctoral researcher at Chalmers University of Technology in the team of Prof. Stenström.

Until March 2014 I was a JSPS Postdoctoral Fellow at the Tokyo Institute of Technology, working in the Matsuoka Laboratory.

Until Jan 2012 I was a Senior Researcher at the Barcelona Supercomputing Center, in the Computer Architecture group. 

Teaching

Some Recent Program Committee activities

Active Projects

Short Bio

I received an MSE degree in Telecommunications from the Technical University of Catalonia (UPC) in 2002, and the Ph.D. degree in Computer Architecture in 2008, also from UPC. From 2003 to 2005 I lectured on computer organization at the Barcelona School of Informatics (FIB). I was a member of the Computer Sciences group of the Barcelona Supercomputing Center (BSC) from 2005 until 2011. In January 2012 I moved to the Tokyo Institute of Technology as a postdoctoral fellow, where I worked in the Matsuoka Laboratory. In April 2014 I joined Chalmers University of Technology, which is located in the beautiful city of Göteborg in Sweden. 

From 2005 until 2008 I worked on the microarchitecture of Kilo-Instruction Processors, which lead to my Ph.D.. My advisor was Prof. Mateo Valero. Before my phd I worked on the power evaluation of VLIW processors with wide functional units (my Master Thesis topic), the design of multi-streamed AES cryptoprocessors and the design of power efficient out-of-order microprocessors pipelines.

Since 2009 my research area has gradually shifted towards High Performance Computing. From 2009 to 2011 I lead a group of PhD students at BSC that studied Field Programmable Gate Arrays (FPGAs) in the context of HPC. We also proposed new highly efficient accelerator architecture by combining the computational power of GPUs and data customization capabilities of reconfigurable logic.

From 2012 to March 2014 I was a JSPS postdoctoral researcher in the Matsuoka Laboratory at TokyoTech. My work focused on performance and data locality analysis in task-parallel runtimes. During this time I developed the KRD tool, a scalable method for reuse distance analysis in multi-socket / multi-core machines.

From  April 2014 to Feb 2016 I have been a postdoctoral fellow at the Department of Computer Science and Engineering of Chalmers University of Technology. My work has focused on the design of runtimes and architectures that exploit high-level semantic information for improved programmability, parallelism, power and predictability. During this time I developed the first version of XiTAO, a lightweight layer on top of C++ to explore task scheduling and resource management. 

Since March 2016 until Jul 2019 I was an Assistant Professor at the Computer Engineering Division. In February 2018 I received the title of Docent. Since July 2019 I am an Associate Professor in the Computer Networks and Systems (CNS) Division. 

I am a member of the ACM, ACM SIGARCH, ACM SIGHPC, the IEEE Computer Society, and IEEE TCuarch.  

A detailed description of my research with references to publications can be found in the Research section of this website.

Contact Information

Department of Computer Science and Engineering

Chalmers University of Technology

Göteborg, 412 96 Sweden

Email: miquelp at chalmers dot se

Curriculum Vitae

Full CV can be downloaded here.