Models are purposeful abstractions of systems and their environments. They can be used to understand, simulate, and validate complex systems at different abstraction levels. Thus, the use of models is of increasing importance for industrial applications. Model-Driven Engineering (MDE) is a development methodology that is based on models, metamodels, and model transformations. The shift from code-centric software development to model-centric software development in MDE opens up promising opportunities for the verification and validation (V&V) of software. On the other hand, the growing complexity of models and model transformations requires efficient V&V techniques in the context of MDE.

The workshop on Model Driven Engineering, Verification and Validation (MoDeVVa) offers a forum for researchers and practitioners who are working on V&V and MDE. The main goals of the workshop are to identify, investigate, and discuss mutual impacts of MDE and V&V.


Modeling is a powerful technique for handling the complexity of the design of software and hardware artifacts, and their respective environments. Model Driven Engineering (MDE) provides efficient tools for building and working with models, from the requirements specification of a system to its verification and validation (V&V). Through the systematic use of digital models, which can be processed automatically by programs, MDE offers the opportunity to validate every step in the life cycle a system. Thus, the first motivation for MoDeVVa is the integration of V&V techniques into MDE.

If MDE is seen as an enabler, claimed to provide benefits to the development process, and to V&V in particular, the usability of MDE tools and techniques applied to V&V processes must be addressed. This is particularly true in contexts such as hardware design or systems engineering where V&V tools and techniques are seldom tailored to the domain in question. We believe that MDE has the potential to improve the V&V process, whereas it is through the means of DSMLs for describing designs, systems, specifications or requirements, the use of model-transformations or other well-known MDE concepts and techniques. 

Moreover, good models facilitate the development of increasingly complex systems. The complexity of such system models and their required processing is growing to the point where models and MDE tools are becoming complex systems themselves. It is therefore necessary to have efficient V&V techniques for models, too. Thus, the second motivation for MoDeVVa is the application of V&V techniques to MDE.

V&V tools and techniques often require arcane notations designed for lower-level languages and formalisms for both the input notations to the tools and their outputs. This hinders the applicability of such tools and techniques to MDE. Therefore, contributions that help closing the gap between such V&V tools and techniques and MDE and which increase their usability are needed to make V&V applicable to MDE. 

Both MDE and V&V intend to help solve real-world problems. Real-world problems and systems are complex. Both MDE and V&V propose approaches to tackle such complexity. Thus, the third motivation for MoDeVVa is the applicability of MDE and V&V to complex, real-world problems.

Improving the applicability of MDE and V&V to real-world problems requires appropriate tools and techniques that can be used by non-MDE and non-V&V experts. Hence contributions in the form of tools that facilitate the use of such techniques are highly desirable. This entails that topics such as user-friendliness, DSMLs and interfaces between modelling IDEs and verification backends are highly desirable.


The objective of the MoDeVVa workshop is to bring together researchers and practitioners in the domain of V&V and MDE so that the key V&V issues in MDE can be identified and solved. For instance, with respect to usability, V&V specialists can bring theoretical foundations and approaches that work best in specific cases. MDE specialists can identify common patterns in these V&V approaches and factorize them, making the concepts easier to understand and use in various contexts.

We are looking to encourage researchers to address the usability shortcomings of V&V and MDE which limit their adoption. In addition to the core issues of MoDeVVa, we also would like to discuss the combination of different  V&V techniques of MDE artifacts (e.g., classical testing, static analysis, model checking, deductive approaches, runtime verification), in order to increase the confidence in the integrity of models and transformations.

Topics of Interest

We will be looking to accept papers any topics relating MDE and V&V. Papers addressing the following issues are particularly welcome:

  • Usability of V&V methods applied to MDE.
  • Usability of MDE in V&V tasks.
  • Tools and techniques that help making use of V&V easier and more applicable to real-world problems.
  • Tools and techniques that help reduce the semantic gap between V&V formalisms and MDE languages.
  • Approaches to hide V&V formalisms from MDE users.
  • Reducing the gap between V&V techniques and MDE.
  • Integration between modelling IDEs and formal verification backends.
  • V&V techniques that are invisible for the end-users who are not familiar with formal techniques (hidden models).
  • Using models to increase practicability of formal verification.

Other topics of interest in the broader areas at the intersection of MDE and V&V are welcome as well:

  • The application and combination of different  V&V techniques (e.g., classical testing, static analysis, model checking, deductive approaches, runtime verification) to of MDE artifacts.
  • Integrating V&V approaches into MDE.
  • Defining V&V approaches that rely on MDE.
  • Modelling conformance relations for checking model refinement.
  • Modelling transformations and models used for V&V.
  • Analysis of models and model transformations; V&V of models, meta-models, and model transformations.
  • Application of the above topics to real-world case studies.


    • Raquel Araújo de Oliveira (University of Toulouse, France)
    • Iulian Ober (University of Toulouse, France)
    • Ernesto Posse (Zeligsoft, Canada)
    • Saad Bin Abid (Fortiss, Germany)

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