COMPUTER ARCHITECTURE AND ORGANIZATION
Contact details:-
VVS.Murthy,
Associate Professor,
ECE Department,
DVR & Dr.HS MIC College of Technology.
Email ID:- murthyvali@gmail.com
SYLLABUS
IV Year-ECE – I SEMESTER T P C
3+1 0 3
Objectives
The student will
· Understand the fundamentals of different instruction set architectures and their relationship to the CPU design.
· Understand the principles and the implementation of computer arithmetic and ALU.
· Understand the memory system, I/O organization
· Understand the operation of modern CPUs including interfacing, pipelining, memory systems and busses.
· Understand the principles of operation of multiprocessor systems.
· Demonstrate the relationship between the software and the hardware and focuses on the foundational concepts that are the basis for current computer design.
UNIT-I
BASIC STRUCTURE OF COMPUTERS: Computer Types, Functional units, Basic operational concepts, Bus structures, Software,
Performance, multiprocessors and multi computers. Data types, Complements, Data Representation. Fixed Point Representation.
Floating – Point Representation. Error Detection codes.
COMPUTER ARITHMETIC: Addition and subtraction, multiplication Algorithms, Division Algorithms, Floating point Arithmetic
operations. Decimal Arithmetic unit, Decimal Arithmetic operations.
UNIT-II
REGISTER TRANSFER LANGUAGE AND MICRO-OPERATIONS: Register Transfer language. Register Transfer, Bus and memory
transfer, Arithmetic Micro-operations, logic micro operations, shift micro-operations,Arithmetic logic shift unit. Instruction
codes. Computer Registers Computer instructions –Instruction cycle.Memory Reference Instructions.
Input Onput and Interrupt. CENTRAL PROCESSING UNIT - Stack organization. Instruction formats. Addressing modes.
DATA Transfer and manipulation. Program control. Reduced Instruction set computer
UNIT-III
MICRO PROGRAMMED CONTROL: Control memory, Address sequencing, micro program example, Design of control
unit-Hard wired control. Micro programmed control
UNIT-IV
THE MEMORY SYSTEM: Memory Hierarchy, Main memory, Auxiliary memory, Associative memory, Cache memory, Virtual memory,
Memory management hardware
UNIT-V
INPUT-OUTPUT ORGANIZATION : Peripheral Devices, Input-Output Interface, Asynchronous data transfer Modes of Transfer,
Priority Interrupt, Direct memory Access, Input –Output Processor (IOP), Serial communication;
UNIT-VI
PIPELINE AND VECTOR PROCESSING: Parallel Processing, Pipelining, Arithmetic Pipeline,Instruction Pipeline,
RISC Pipeline Vector Processing, Array Processors. Multi processors: Characteristics of Multiprocessors,
Interconnection Structures, Interprocessor Arbitration. Interprocessor Communication and Synchronization, Cache Coherence.
TEXT BOOKS:
1. Computer System Architecture – M.Moris Mano, IIIrd Edition, PHI / Pearson, 2006.
2. Computer Organization – Car Hamacher, ZvonksVranesic, SafwatZaky, V Edition, McGraw Hill, 2002.
REFERENCES:
1. Computer Organization and Architecture – William Stallings Seventh Edition, PHI/Pearson, 2006.
2. Computer Architecture and Organization – John P. Hayes, Mc Graw Hill International editions, 1998.