incl. modulators, demodulators and modems
For detailed information about my design for ICs and IP cores for communication systems see my site at http://www.angelia.eu.org/
Integrated Circuits for PC and Mobile Broadband Satellite Internet (SatNet) Access System with or without satellite bases, for portable uses for single person and home, movable on any point of the earth or fixed use.
Circuits have been designed and simulated using Xilinx Vivado, Altera Quartus, Mentor Graphics, Cadence Virtuoso, MATLAB/SIMULINK and other popular EDA tools.
TSMC 0.18um MMRF CMOS process technology is applied at a power supply of +/- 0.9v.
Our modulator, demodulator and modem IC cores will be applicable to DVB standards series (DVB-S2/S2X) as well as other popular satellite Internet standards.
The technologies involve SDR (Software Defined Radio), FPGA (Field Programmable Gate Arrays) , DSP (Digital Signal Processors), GPU (Graphical Processing Unit), SoC (System on Chip), CPU (Central Processing Unit) and other IC technologies. Some topics may relate to chip design and manufacturing, and configurable circuits applicable to the design of satellite based broadband Internet modulator, demodulator and modem IP cores.
We have implemented waveforms with BPSK, QPSK, DQPSK, OQPSK, 8PSK, 16APSK, 32APSK, 64APSK (128APSK and 256APSK Optional), 8QAM, Adaptive Coding and Modulation (ACM), Variable Coding and Modulation (VCM), Constant Coding and Modulation (CCM) and with Reed-Solomon/LDPC/Turbo Product Code FEC that are readily portable to LEO/MEO/GEO satelite downlinks. Our signal processing techniques are among the most advanced in the communication industry.
Deliverables
VHDL /Verilog FPGA / DSP / GPU / CPU Source Code and netlist binary file
Test environment for the hardware of the IP core consisting of VHDL /Verilog testbench and test data as well as post-synthesis simulation model or pre-compiled simulation model
Test script
Design Flow Documentation