Digital Design and Computer Organization

YouTube recorded Video

1. Demonstration of  Lab program using Verilog and Pspice Click here 

      a) Demonstartion of basic gate NOT gate using verilog Click here 

      b) Demonstration of basic gates OR gate using verilog click here 

      c) Demonstrtaion of basic gate AND gate using verilog Click here 

      d) Lab Program 6-  All Three Click here     

                           Multiplexer 2:1 , Multiplexer-4:1  and Multiplexer 8:1 

      e) Lab Program 7-  Demultiplexer 1:8 and   Demultiplexer with test benches 1:8   

                                         Demultiplexer 1:4  and Demultiplexer with test benches 1:4 

2. Demonstration of program using hardware and VHDL Click Here 

3. Theorical Concepts about multiplexer, Flip-flops, Registers, Counters and VHDL modules Click Here 

MODULE-WISE NOTES

MODULE 1-  Chapter 1 and 2 

                        Chapter 3-K-Map &NAND-NOR 

                        Chapter 3- 3.9-Verilog and VHDL 

MODULE 2: CHAPTER 4   Combinational Logic Circuits 

                     CHAPTER 5: Sequential circuits 

Module  3: [Computer Organization ] Chapter 1  and Chapter 2  

Module 4: Chapter 4  Input output organization

                    Chapter 4 & 5: I/O Organization and Cache Memory  

Module 5: Chapter 7 & 8: Basic Processing Unit & Pipelining