SEMINAR, TRAINING AND WORKSHOPS ATTENTED

• “Xilinx Soc:FPGA Based Design” is a Faculty Development programme conducted by IIT Guwahati in collaboration with NIT, Tiruchirapalli during 30th July – 3rd Aug 2018.

• “Think Parallel: Parallel Programming for Engineers &Scientists” is a 5-days training programme conducted by CDAC, Bangalore during20th – 24th  July 2015.

• “Advanced Embedded System Design on Zynq using Vivado targeting Zed Board” a workshop conducted by NIT, Trichy during 27th – 28th Aug 2015.

•  “System Design on Zynq using SDSoC” is a workshop conducted by IIT Madras during 1st– 3rd Jan 2016.

•  “Visvesvaraya PhD Scheme Paper Presentation and Review Meeting” conducted by Indian Institute of Technology Bombay (IITB), Mumbai in collaboration with DEITY during 13th– 14th Oct 2016.