● Cache memory, Sung Woo Chung,
Joonho Kong, United States Publication Number: US8068381 B2 (grant), November 29, 2011, United States.
● Monolithic 3D (M3D) Integration-based Cache Memory, Sung Woo Chung, Joonho Kong, Young-Ho Gong, Korea Application Number: 1019139300000 , October 25, 2018, Korea
● Refresh method and apparatus for memory cells, Joonho Kong, Korea Application Number: 1019139140000 , October 25, 2018, Korea
● Apparatus for controlling cache using next-generation memory and method thereof, Joonho Kong, Korea Registration Number: 1018312260000, February 14, 2018, Korea
● Device and method for aging detecting using a pair ring oscillator, Joonho Kong, Korea Registration Number: 1017680350000, August 8, 2017, Korea
● Apparatus for adaptive cache access in computing system and method thereof, Joonho Kong, Korea Registration Number: 1018635780000, December 1, 2016, Korea
● Cache memory apparatus and method having function of saving energy for refresh, Joonho Kong, Korea Registration Number: 1018635900000, November 30, 2016, Korea
● Memory device, processor and data writing/reading method, Sung Woo Chung,
Joonho Kong, Korea Registration Number: 1012819710000, June 27, 2013, Korea
● Apparatus and method for scheduling task and resizing cache memory of embedded multicore processor, Sung Woo Chung,
Joonho Kong, Korea Registration Number: 1012325610000, February 5, 2013, Korea
● CPU Frequency Selection Device And Method Thereof, Sung Woo Chung, Junhee Lee,
Joonho Kong, Korea Registration Number: 1011044710000, January 3, 2012, Korea.
● Method for managing computer power using web camera, Sung Woo Chung, Jae Min Kim, Minyong Kim,
Joonho Kong, Korea Registration Number: 1010834730000, November 8, 2011, Korea.
● Cache memory, Sung Woo Chung,
Joonho Kong, Korea Registration Number: 1010416820000, June 8, 2011, Korea.
● Cache memory, Sung Woo Chung,
Joonho Kong, Korea Registration Number: 1009482710000, March 11, 2010, Korea.
● Microprocessor system, Sung Woo Chung,
Joonho Kong, Jinhang Choi, Korea Registration Number: 1009757470000, August 6, 2010, Korea.
● Method for preventing damage of instruction cache memory by malicious code, Sung Woo Chung,
Joonho Kong, Korea Registration Number: 1009165500000, September 2, 2009, Korea.
● Method for writing data in data bit array of the cache memory including fault data bit and method for reading data from data bit array of the cache memory including fault data bit, Sung Woo Chung, Do Yeun Kim, Jong Sung Lee, Hyung Beom Jang,
Joonho Kong, Jin Hang Choi, Korea Registration Number: 1009045180000, June 17, 2009, Korea.
● Reviewer of Design Automation Conference (DAC) 2014
● Reviewer of International Symposium on Circuits And Systems (ISCAS) 2014
● Reviewer of ETRI Journal
● Reviewer of ACM Conference on Computer and Communication Security (CCS) 2013
● Reviewer of IEEE Design & Test of Computers
● Reviewer of Design Automation Conference (DAC) 2013
● Reviewer of IEEE Transactions on Computers (TC)
● Reviewer of IEEE Transactions on Information Forensics and Security (TIFS)
● Reviewer of IEEE International Conference on Computer Design (ICCD) 2011
● Reviewer of Asia Symposium & Exhibits on Quality Electronics Design (ASQED) 2010
● IEEE member (09/2011~present)